VUnit/vunit issues and pull requests

#1055 - Fix syntax error in id_pkg

Pull Request - State: closed - Opened by diedricm 6 months ago - 2 comments

#1054 - Added support for timeout in the wait_until_idle call.

Pull Request - State: closed - Opened by LarsAsplund 6 months ago

#1053 - Added support for setting run_all_in_same_sim and fail_on_warning attributes from Python

Pull Request - State: closed - Opened by LarsAsplund 6 months ago

#1052 - GHDL Interface can not detect GCC backend with newer GHDL/mcode, Microsoft Windows

Issue - State: closed - Opened by mbermal 6 months ago - 2 comments

#1051 - Sim time format

Pull Request - State: closed - Opened by LarsAsplund 6 months ago

#1050 - Runtime data input from Python to VHDL

Issue - State: open - Opened by suryabvsp 7 months ago - 1 comment

#1049 - AXI stream updates

Pull Request - State: closed - Opened by LarsAsplund 7 months ago

#1048 - Simulation fails with Modelsim with special character in path

Issue - State: open - Opened by magnmaeh 7 months ago - 1 comment

#1047 - Fix link to ghdl docker

Pull Request - State: open - Opened by oscargus 7 months ago

#1046 - OSVVM update

Issue - State: open - Opened by c-thaler 7 months ago - 9 comments

#1045 - Regression: exploded stack in log function when running with Acitve-HDL

Issue - State: open - Opened by jobtijhuis 7 months ago - 2 comments

#1044 - Configurable simulation time resolution in logging

Issue - State: closed - Opened by LarsAsplund 7 months ago - 14 comments

#1043 - Emphasized pre-releases in release notes.

Pull Request - State: closed - Opened by LarsAsplund 7 months ago

#1042 - Add flag to generate FST file from NVC, without spawning GTKWave

Pull Request - State: open - Opened by kmtaylor 7 months ago - 2 comments

#1041 - Add SPI verification components

Pull Request - State: open - Opened by n8tlarsen 7 months ago - 3 comments

#1040 - Use Paths rather than strings where possible

Pull Request - State: open - Opened by oscargus 7 months ago - 1 comment

#1039 - Allow automatically determining the number of threads

Pull Request - State: closed - Opened by oscargus 8 months ago - 5 comments

#1038 - GHDL 4.1.0 mcode backend not recognized

Issue - State: closed - Opened by n8tlarsen 8 months ago - 3 comments

#1037 - Set NVC_CONCURRENT_JOBS to value of num_threads argument

Pull Request - State: closed - Opened by nickg 8 months ago

#1036 - NVC performance with Vunit

Issue - State: closed - Opened by Blebowski 8 months ago - 16 comments

#1035 - Fixes #1026.

Pull Request - State: closed - Opened by LarsAsplund 8 months ago

#1034 - Updated black job to show formatting violations.

Pull Request - State: closed - Opened by LarsAsplund 8 months ago

#1033 - Add vunit_tb_name tcl variable and vunit_tb_path for Active-HDL

Pull Request - State: closed - Opened by maleiter 8 months ago - 2 comments

#1032 - Add VUnit TCL commands to Active-HDL

Pull Request - State: closed - Opened by LarsAsplund 8 months ago

#1031 - [Possible Bug/Clarification] package xpm.vcomponents is not found

Issue - State: closed - Opened by nselvara 8 months ago - 3 comments

#1030 - [Feature] Make `check_equal` a generic procedure

Issue - State: open - Opened by nselvara 8 months ago - 5 comments
Labels: Enhancement

#1029 - [Question] ModelSim reports an error regarding VHDL-2019 package

Issue - State: closed - Opened by nselvara 8 months ago - 3 comments

#1028 - [Clarification] Pass multiple `wave.do` scripts

Issue - State: closed - Opened by nselvara 8 months ago - 10 comments

#1027 - Removed Questasim compilation warning. Fixes #981. (2)

Pull Request - State: closed - Opened by rafaelnp 9 months ago - 1 comment

#1026 - No warning of erroneous architecture when adding configurations

Issue - State: closed - Opened by sigmuha 9 months ago - 3 comments

#1025 - Enchance time reporting in report.py and runner.py

Pull Request - State: closed - Opened by tossegus 9 months ago - 12 comments

#1024 - modelsim ini options for GUI mode

Pull Request - State: open - Opened by alexrayne 9 months ago

#1023 - allow use modelsim predefined external libs

Pull Request - State: open - Opened by alexrayne 9 months ago

#1022 - Updates to pass latest version of pylint

Pull Request - State: closed - Opened by LarsAsplund 9 months ago

#1021 - Issue with using encrypted Vivado IP in Vunit

Issue - State: closed - Opened by AN-SEOKHYEN 9 months ago - 3 comments

#1020 - Check 4kByte boundary from aligned address

Pull Request - State: closed - Opened by ru551n 9 months ago - 3 comments

#1019 - Unaligned access to AXI read slave yields incorrect data

Issue - State: open - Opened by ru551n 9 months ago - 4 comments

#1018 - Unaligned accesses to AXI read and write slaves wrongly fail 4kbyte boundary check

Issue - State: closed - Opened by ru551n 9 months ago

#1017 - Add axi master

Pull Request - State: open - Opened by DavidMartinPhios 9 months ago - 12 comments

#1016 - GHDL mcode regex not detecting properly

Issue - State: closed - Opened by avivi55 10 months ago

#1015 - Add option for disabling NVC `--jit`

Pull Request - State: closed - Opened by albydnc 10 months ago - 4 comments

#1014 - Remove forced `--jit` from NVC

Issue - State: closed - Opened by albydnc 10 months ago - 1 comment

#1013 - Is there a way to specify minimum cycles between stalls for AXI stream VC?

Issue - State: open - Opened by cjmeyer 10 months ago - 1 comment

#1012 - Question about "blocking" specifically around the bus_master VCI

Issue - State: open - Opened by nathanaelhuffman 10 months ago - 1 comment

#1011 - Indexing order for 3D `integer_array_t` doesn't make sense

Issue - State: open - Opened by bradleyharden 10 months ago

#1010 - How to specify test case(s) to run after creating a VUnit instance?

Issue - State: open - Opened by cjmeyer 10 months ago - 2 comments

#1009 - VUnit testcases fail if the testcase name contains a colon (SystemVerilog)

Issue - State: open - Opened by PossenigM 10 months ago - 2 comments

#1008 - VUnit testcases fail if the last character in a testcase name is a whitespace (VHDL)

Issue - State: open - Opened by PossenigM 10 months ago
Labels: Bug

#1006 - Force stop simulation

Issue - State: open - Opened by nselvara 11 months ago - 4 comments

#1005 - Add GHDL backend detection support for mcode JIT

Pull Request - State: closed - Opened by LukasVik 11 months ago - 2 comments
Labels: Enhancement, Simulator support, Tool: GHDL

#1004 - Add note for #967

Pull Request - State: closed - Opened by oscargus 11 months ago
Labels: Docs

#1003 - Support for CI (reruns) with waveform output

Issue - State: open - Opened by oscargus 12 months ago - 4 comments
Labels: Enhancement, Question, CI, Tool: Surfer

#1002 - Support arbitrary waveform viewer

Pull Request - State: closed - Opened by oscargus 12 months ago - 6 comments
Labels: Enhancement, Tool: GtkWave, Tool: Surfer

#1001 - Add news fragment

Pull Request - State: closed - Opened by awillenbuecher-xq-tec 12 months ago - 1 comment
Labels: Docs

#1000 - Add news fragments

Pull Request - State: closed - Opened by LukasVik 12 months ago
Labels: Docs

#999 - Feature Request: real_array_t similar to integer_array_t

Issue - State: open - Opened by abaebae 12 months ago - 2 comments
Labels: Enhancement, Builtins

#998 - docs/news: add fragment for #909

Pull Request - State: closed - Opened by abaebae 12 months ago
Labels: Docs

#997 - News fragments of the contributions/modifications done in the last 7 months

Issue - State: closed - Opened by umarcor 12 months ago - 1 comment

#996 - ModelSim/QuestaSim issues warning regarding `ext_string_pkg`

Issue - State: closed - Opened by nselvara 12 months ago

#995 - Remove redundant directory from Riviera-PRO dataset path

Pull Request - State: open - Opened by por3bski 12 months ago - 1 comment
Labels: Enhancement, Tool: RivieraPro

#994 - Drive invalid in AXI VCs

Pull Request - State: closed - Opened by LukasVik 12 months ago - 4 comments
Labels: Enhancement, Breaking change

#993 - ModelSim issues warning regarding NULL array in id_pkg

Issue - State: closed - Opened by nselvara 12 months ago

#992 - Minimize imports in an effort to lower simulation setup time

Pull Request - State: closed - Opened by LukasVik 12 months ago - 4 comments
Labels: Enhancement, Builtins

#991 - Add py.typed

Pull Request - State: closed - Opened by LukasVik 12 months ago - 5 comments
Labels: Enhancement

#990 - Fix regex for VHDL component instantiations

Pull Request - State: open - Opened by javValverde 12 months ago

#989 - check_equal support for fixed_pkg resolve #909

Pull Request - State: closed - Opened by abaebae 12 months ago - 4 comments
Labels: Enhancement, Builtins

#988 - GHDL wrong path for stimuli

Issue - State: open - Opened by albydnc about 1 year ago

#987 - Help with attribute

Issue - State: closed - Opened by bryankerr1986 about 1 year ago - 1 comment

#986 - VHDL-embedded Python code

Pull Request - State: open - Opened by LarsAsplund about 1 year ago - 8 comments

#985 - Providing unit test results in Sphinx documentation

Issue - State: open - Opened by Paebbels about 1 year ago - 5 comments

#984 - Support for merging coverage results with nvc

Issue - State: open - Opened by rpatel3001 about 1 year ago - 3 comments

#983 - test_runner_cleanup passes entry_gate after 1ms although it is locked

Issue - State: closed - Opened by mkdev-0 about 1 year ago - 2 comments

#982 - 1 test fals: Failed to find license notice in /usr/ports/cad/py-vunit-hdl/work-py39/vunit-4.7.0/build/lib/vunit/vhdl/osvvm/AlertLogPkg.vhd

Issue - State: open - Opened by yurivict about 1 year ago

GitHub / VUnit/vunit issues and pull requests