GitHub / zfturbo / verilog-generator-of-neural-net-digit-detector-for-fpga issue stats
Last synced: 2 months ago
Total issues: 28
Total pull requests: 9
Average time to close issues: about 2 months
Average time to close pull requests: about 7 hours
Total issue authors: 18
Total pull request authors: 4
Average comments per issue: 4.61
Average comments per pull request: 0.0
Merged pull requests: 7
Bot issues: 0
Bot pull requests: 0
Past year issues: 1
Past year pull requests: 2
Past year average time to close issues: N/A
Past year average time to close pull requests: N/A
Past year issue authors: 1
Past year pull request authors: 1
Past year average comments per issue: 0.0
Past year average comments per pull request: 0.0
Past year merged pull requests: 0
Past year bot issues: 0
Past year bot pull requests: 0
JSON API: https://issues.ecosyste.ms/api/v1/hosts/GitHub/repositories/zfturbo%2Fverilog-generator-of-neural-net-digit-detector-for-fpga
Issue Author Associations
- None (28, 100.00%)
Pull Request Author Associations
- Contributor (6, 66.67%)
- None (2, 22.22%)
Top Issue Authors
- kangliyu1 (8)
- ECEVLSIWorld (3)
- xw2333 (2)
- pualdelis (1)
- gabrielchin96 (1)
- baogiadoan (1)
- giathinhlenguyen (1)
- hooper888 (1)
- peepo (1)
- QiQi-OvO (1)
- MisRight (1)
- hithere124 (1)
- JonathanKing01 (1)
- ghost (1)
- Bahadiirr (1)
Top Pull Request Authors
- MaKaRoIIIKa (3)
- JohnConnor123 (2)
- alxndrkalinin (2)
- aaronferrucci (1)