Ecosyste.ms: Issues
An open API service for providing issue and pull request metadata for open source projects.
GitHub / chipsalliance/fpga-interchange-tests issues and pull requests
#134 - ci: update custom runners labels
Pull Request -
State: closed - Opened by kgugala almost 2 years ago
#133 - Add building data for NISP
Pull Request -
State: closed - Opened by mkurc-ant about 2 years ago
- 2 comments
#132 - Bump the python-fpga-interchange submodule
Pull Request -
State: closed - Opened by mkurc-ant about 2 years ago
#131 - Upload interchange data to GCP with GitHub Actions
Pull Request -
State: closed - Opened by rw1nkler over 2 years ago
- 2 comments
#130 - Add set -e to setup bash scripts
Pull Request -
State: closed - Opened by tmichalak over 2 years ago
#129 - Add UHDM/SystemVerilog support and test
Pull Request -
State: open - Opened by kboronski-ant over 2 years ago
#128 - [nextpnr-fpga-interchange] Improve place and route runtime
Issue -
State: open - Opened by clavin-xlnx over 2 years ago
#127 - Error trying to convert xcvu095-ffva2104-2-e.device to json
Issue -
State: open - Opened by zhilix over 2 years ago
- 1 comment
#126 - [nextpnr-fpga-interchange] Incorrect LUT INIT causing CRITICAL WARNINGS in Vivado
Issue -
State: open - Opened by clavin-xlnx over 2 years ago
#125 - [nextpnr_fpga_interchange] Failure in placement
Issue -
State: closed - Opened by clavin-xlnx over 2 years ago
- 3 comments
#124 - [nextpnr_fpga_interchange] Fails to properly place and route a design with hierarchy
Issue -
State: open - Opened by clavin-xlnx over 2 years ago
#123 - [nextpnr_fpga_interchange] Fails when encountering unsupported XDC commands, provides warnings for others
Issue -
State: open - Opened by clavin-xlnx over 2 years ago
#122 - [nextpnr_fpga_interchange] ERROR: Assert ctx->checkRoutedDesign() failed
Issue -
State: open - Opened by clavin-xlnx over 2 years ago
#121 - A Tcl script that can take an arbitrary netlist and use Vivado to create pin placements
Issue -
State: open - Opened by clavin-xlnx over 2 years ago
#120 - [nextpnr_fpga_interchange] Proceed with place and route despite missing pin placement constraints
Issue -
State: open - Opened by clavin-xlnx over 2 years ago
#119 - cmake: add target to run all dcp generation for xilinx archs
Pull Request -
State: closed - Opened by acomodi over 2 years ago
#118 - Refactor CI to add centOS 7
Pull Request -
State: closed - Opened by acomodi over 2 years ago
#117 - WIP: test centos7
Pull Request -
State: closed - Opened by acomodi over 2 years ago
- 1 comment
#116 - [BOT] Conda Lock Update
Pull Request -
State: open - Opened by github-actions[bot] over 2 years ago
Labels: merge-if-green, bot-conda-lock-update
#115 - [BOT] Conda Lock Update
Pull Request -
State: closed - Opened by github-actions[bot] over 2 years ago
Labels: merge-if-green, bot-conda-lock-update
#114 - Run cron CI
Pull Request -
State: closed - Opened by acomodi over 2 years ago
#113 - Cannot run test suite in CentOS Linux 7.4
Issue -
State: closed - Opened by clavin-xlnx over 2 years ago
- 6 comments
#112 - docs: theme s/SymbiFlow/F4PGA/
Pull Request -
State: closed - Opened by umarcor over 2 years ago
#111 - Bump python-fpga_interchange
Pull Request -
State: closed - Opened by kboronski-ant almost 3 years ago
- 3 comments
#110 - Bump python-fpga_interchange
Pull Request -
State: closed - Opened by kboronski-ant almost 3 years ago
#109 - tests: zcu104: add murax test
Pull Request -
State: open - Opened by acomodi almost 3 years ago
- 1 comment
#108 - Bump python-fpga_interchange version
Pull Request -
State: closed - Opened by kboronski-ant almost 3 years ago
#107 - PLLE4 test for ZCU104
Pull Request -
State: closed - Opened by kboronski-ant almost 3 years ago
- 1 comment
#106 - DCP generation fails for some tests
Issue -
State: closed - Opened by acomodi almost 3 years ago
- 4 comments
#105 - Bump RapidWright
Pull Request -
State: closed - Opened by acomodi almost 3 years ago
#104 - results: fix plot graph in web report
Pull Request -
State: closed - Opened by acomodi almost 3 years ago
#103 - Add tests for Kintex-7
Pull Request -
State: closed - Opened by robertszczepanski almost 3 years ago
#102 - enable a public GCP bucket to store the device data and chipdb
Issue -
State: open - Opened by acomodi almost 3 years ago
- 5 comments
#101 - WIP: ci: gh: initial code to upload artifacts to GCP
Pull Request -
State: closed - Opened by acomodi almost 3 years ago
- 1 comment
#100 - Add tests for Spartan 7
Pull Request -
State: closed - Opened by robertszczepanski almost 3 years ago
#99 - Add US+ BRAM test
Pull Request -
State: closed - Opened by kboronski-ant almost 3 years ago
- 1 comment
#98 - Feature tests for Ultrascale+ (failing on not placeable element)
Pull Request -
State: closed - Opened by kboronski-ant almost 3 years ago
- 3 comments
#97 - Feature tests for Ultrascale+ (hanging on analytical placer)
Pull Request -
State: closed - Opened by kboronski-ant almost 3 years ago
- 1 comment
#96 - Feature tests for Ultrascale+ (failing due to no route)
Pull Request -
State: open - Opened by kboronski-ant almost 3 years ago
#95 - BELs bound to multiple pads on Ultrascale+
Issue -
State: closed - Opened by kboronski-ant almost 3 years ago
- 1 comment
#94 - fasm2bels tests failure to read DCP in Vivado
Issue -
State: closed - Opened by acomodi almost 3 years ago
- 4 comments
#93 - Feature tests for Ultrascale+
Pull Request -
State: closed - Opened by kboronski-ant almost 3 years ago
- 7 comments
#92 - Bump RapidWright version
Pull Request -
State: closed - Opened by kboronski-ant almost 3 years ago
#91 - Use Rapid YAML from PyPi
Pull Request -
State: closed - Opened by tmichalak almost 3 years ago
#90 - Add VPR initial test
Pull Request -
State: closed - Opened by acomodi about 3 years ago
#89 - tests: remove retarget from LiteX tests
Pull Request -
State: open - Opened by acomodi about 3 years ago
#88 - tests: add cell to bel mapping in test arch
Pull Request -
State: closed - Opened by acomodi about 3 years ago
#87 - LUT-thru tests
Pull Request -
State: open - Opened by mkurc-ant about 3 years ago
#86 - GH action: add conda bot lock
Pull Request -
State: open - Opened by acomodi about 3 years ago
#85 - testarch: remove LUT definitions patching step
Pull Request -
State: closed - Opened by acomodi about 3 years ago
#84 - Move lutDefinition into generation step
Pull Request -
State: closed - Opened by mtdudek about 3 years ago
#83 - Add test to help development of VTR Interchange
Pull Request -
State: closed - Opened by acomodi over 3 years ago
#82 - Testarch tests
Pull Request -
State: closed - Opened by mtdudek over 3 years ago
- 1 comment
#81 - sphinx output is using old symbiflow theme
Issue -
State: open - Opened by mithro over 3 years ago
#80 - Add possibility to choose different PnR tools
Pull Request -
State: closed - Opened by acomodi over 3 years ago
#79 - Delete expired Let's Encrypt certificate.
Pull Request -
State: closed - Opened by mithro over 3 years ago
#78 - Macro clusters
Pull Request -
State: closed - Opened by mtdudek over 3 years ago
#77 - Add Linux Litex test
Pull Request -
State: closed - Opened by acomodi over 3 years ago
#76 - Larger designs end up in netlist traversal limit being reached
Issue -
State: open - Opened by acomodi over 3 years ago
Labels: bug
#75 - Site LUT mapping cache error
Issue -
State: open - Opened by acomodi over 3 years ago
Labels: bug, invalid
#74 - Conda-built nextpnr fails after placement
Issue -
State: open - Opened by acomodi over 3 years ago
#73 - requirements: add edit mode when installing third_party
Pull Request -
State: closed - Opened by acomodi over 3 years ago
#72 - Add LiteX designs
Pull Request -
State: closed - Opened by acomodi over 3 years ago
#71 - bump nextpnr-interchange and python-interchange
Pull Request -
State: closed - Opened by acomodi over 3 years ago
#70 - PLL test (off-chip feedback) fails the dcp_diff_fasm test
Issue -
State: open - Opened by mkurc-ant over 3 years ago
- 1 comment
#69 - tests: add failure allowance to correctly check regressions
Pull Request -
State: closed - Opened by acomodi over 3 years ago
#68 - Add tests for PLL and MMCM
Pull Request -
State: closed - Opened by mkurc-ant over 3 years ago
#67 - Update tools packages
Pull Request -
State: closed - Opened by acomodi over 3 years ago
#67 - Update tools packages
Pull Request -
State: closed - Opened by acomodi over 3 years ago
#66 - Add picosoc design
Pull Request -
State: closed - Opened by jedrzejboczar over 3 years ago
#65 - tests: add murax test for arty35t
Pull Request -
State: closed - Opened by jedrzejboczar over 3 years ago
- 1 comment
#65 - tests: add murax test for arty35t
Pull Request -
State: closed - Opened by jedrzejboczar over 3 years ago
- 1 comment
#64 - Design status reports
Pull Request -
State: closed - Opened by mkurc-ant over 3 years ago
- 3 comments
#63 - gh-actions: add remaining devices
Pull Request -
State: closed - Opened by acomodi over 3 years ago
- 1 comment
#62 - CI: use self-hosted runners
Pull Request -
State: closed - Opened by AdamOlech over 3 years ago
#61 - Added an OBUFT test
Pull Request -
State: closed - Opened by mkurc-ant over 3 years ago
#60 - WIP: Add lutram tests
Pull Request -
State: closed - Opened by acomodi over 3 years ago
- 1 comment
#59 - Remove swp file
Pull Request -
State: closed - Opened by acomodi over 3 years ago
#58 - Temporary fix for issue #56
Pull Request -
State: closed - Opened by mtdudek over 3 years ago
- 1 comment
#57 - Add RAMB36
Pull Request -
State: closed - Opened by mtdudek over 3 years ago
#56 - Issue with the rapidyaml Python package
Issue -
State: open - Opened by mkurc-ant over 3 years ago
- 2 comments
Labels: bug
#55 - Add FD cell to remap_xc7
Pull Request -
State: closed - Opened by mtdudek over 3 years ago
- 6 comments
#55 - Add FD cell to remap_xc7
Pull Request -
State: closed - Opened by mtdudek over 3 years ago
- 6 comments
#54 - Getting the litex+picorv32+litedram test integrated and working
Issue -
State: open - Opened by gatecat over 3 years ago
#53 - xcup: Enable global clock routing
Pull Request -
State: open - Opened by gatecat over 3 years ago
#52 - Conflicts when cell name equals its cell type
Issue -
State: open - Opened by acomodi over 3 years ago
- 1 comment
#51 - devices: add install target for device and chipdb
Pull Request -
State: closed - Opened by acomodi over 3 years ago
- 1 comment
#50 - zcu104: Add counter test
Pull Request -
State: closed - Opened by gatecat over 3 years ago
- 2 comments
#49 - Add timing tests
Pull Request -
State: closed - Opened by mtdudek over 3 years ago
- 2 comments
#48 - tests: add IDELAY to serdes test
Pull Request -
State: closed - Opened by acomodi over 3 years ago
#47 - kokoro: test vivado 2019.2
Pull Request -
State: closed - Opened by acomodi over 3 years ago
#46 - tests: serdes: fix initial assignments
Pull Request -
State: closed - Opened by acomodi over 3 years ago
#45 - tests: xc7: use carry chains
Pull Request -
State: closed - Opened by acomodi over 3 years ago
#44 - Add serdes test
Pull Request -
State: closed - Opened by acomodi over 3 years ago
#43 - UltraScale+ test with ZCU104
Pull Request -
State: closed - Opened by gatecat over 3 years ago
- 6 comments
#42 - tests: features: add obufds test
Pull Request -
State: closed - Opened by acomodi over 3 years ago
- 3 comments
#41 - requirements: use rapidyaml from PyPI
Pull Request -
State: closed - Opened by acomodi over 3 years ago
#40 - Need to specify all cell's IOs for correct DCP
Issue -
State: open - Opened by acomodi over 3 years ago
- 2 comments
#39 - Add large 7-series parts
Pull Request -
State: closed - Opened by mkurc-ant over 3 years ago
- 1 comment
#38 - env: use prjoxide from conda
Pull Request -
State: closed - Opened by acomodi over 3 years ago
- 2 comments