umd-memsys/DRAMSim2 issues and pull requests

#81 - DRAMSIM2 on gem5

Issue - State: open - Opened by NedasadatTaheri almost 3 years ago

#80 - How to generate the *.trc.gz trace files?

Issue - State: closed - Opened by HaFred about 4 years ago - 2 comments

#79 - add old work

Pull Request - State: closed - Opened by rpiwangdabai about 4 years ago

#78 - Does DRAMSim2 provides support for DDR4 simulation ?

Issue - State: closed - Opened by gkothar1 over 4 years ago

#77 - Does DRAMsim2 use watermark to select between read and write?

Issue - State: open - Opened by allencho1222 over 4 years ago

#76 - "Total transacations for multiple channels"

Issue - State: open - Opened by tks2004 over 5 years ago

#75 - how to generate a physical trace file by using gpgpu-sim,thank you

Issue - State: open - Opened by licaiwei397 over 5 years ago

#74 - Introducing the Delay Queue

Pull Request - State: open - Opened by rommelsv over 6 years ago - 2 comments
Labels: features

#73 - Generating physical address trace of a program

Issue - State: closed - Opened by sarabjeetsingh007 over 6 years ago - 2 comments

#72 - delay calculate bug!

Issue - State: closed - Opened by Cassiel-girl over 6 years ago - 1 comment

#71 - what's the scheduling policy supported by DRAMSim2?

Issue - State: closed - Opened by Cassiel-girl over 6 years ago - 1 comment

#70 - Power calculation in MemoryController.cpp

Issue - State: closed - Opened by konbick about 7 years ago - 1 comment

#69 - Interpreting DRAMSim2 results (only 8 banks?)

Issue - State: closed - Opened by konbick over 7 years ago - 1 comment

#68 - Would you be willing to share your validation flow?

Issue - State: closed - Opened by davidbiancolin over 7 years ago - 2 comments

#67 - trace files fro running DRAMSim2

Issue - State: closed - Opened by naveen168 almost 8 years ago - 6 comments

#66 - Adapted for DDR4

Pull Request - State: closed - Opened by luyikang almost 8 years ago

#65 - Implementing row individual refresh rate

Issue - State: closed - Opened by konbick almost 8 years ago - 5 comments

#64 - TOTAL_ROW_ACCESSES exceeds assigned number

Issue - State: open - Opened by shavvn almost 8 years ago

#63 - Command Queue Scheduling Issue when refresh_waiting is Set

Issue - State: open - Opened by shavvn almost 8 years ago - 1 comment

#62 - Wiki link dead

Issue - State: open - Opened by RSpliet about 8 years ago - 1 comment

#61 - Master

Pull Request - State: closed - Opened by inciaf over 8 years ago - 2 comments

#60 - Is data_storage branch stable

Issue - State: open - Opened by kelayamatoz over 8 years ago - 1 comment

#59 - DRAMSim2-Gem5 Average Latency

Issue - State: open - Opened by inciaf over 8 years ago - 2 comments

#58 - Meaning of ini parameters

Issue - State: closed - Opened by dzaragoza almost 10 years ago - 3 comments

#57 - Steps after installing DRAMSim2 on linux

Issue - State: open - Opened by swanandM about 10 years ago - 1 comment

#56 - DRAMSim2 instalation

Issue - State: open - Opened by swanandM about 10 years ago - 1 comment

#55 - running DRAMSim in trace mode and encountered an error

Issue - State: open - Opened by sllu about 10 years ago - 2 comments

#54 - Trace based Simulation

Issue - State: open - Opened by zowda about 10 years ago - 1 comment

#53 - DRAMSim: export Ini configuration getters

Pull Request - State: closed - Opened by cota about 10 years ago

#52 - AddressMapping: precompute log2 values to increase performance

Pull Request - State: closed - Opened by cota over 10 years ago

#51 - For dramninjas

Pull Request - State: closed - Opened by cota over 10 years ago

#50 - About the ECC functionality in DRAMSim2

Issue - State: closed - Opened by MichaelTong over 10 years ago - 1 comment

#49 - How to integrate DRAMSim2 with Eclipse IDE

Issue - State: open - Opened by sid392 over 10 years ago - 1 comment

#48 - Is there a mailing list to discuss DRAMSim2

Issue - State: closed - Opened by HarryWei over 10 years ago - 2 comments

#47 - How to make the refresh run in ROR mode?

Issue - State: closed - Opened by lwj0012 over 10 years ago - 3 comments

#46 - simulation performance

Issue - State: open - Opened by wky over 10 years ago - 1 comment

#45 - PARSEC workload

Issue - State: open - Opened by ahmed-shafik over 10 years ago - 1 comment

#44 - Question about DRAM timing equations table

Issue - State: open - Opened by agdespopoulos over 10 years ago

#43 - int 000::ReorderBufferEntry Aborted (core dumped)

Issue - State: closed - Opened by ychoijy over 10 years ago - 3 comments

#42 - Unable to successfully run scons due to undefined reference to BIT in kvm.c

Issue - State: closed - Opened by varunkumhar almost 11 years ago - 3 comments

#41 - Bad Alloc

Issue - State: open - Opened by ahmed-shafik almost 11 years ago - 1 comment

#40 - Interleaved memory

Issue - State: open - Opened by hphphphp3 almost 11 years ago - 3 comments

#39 - Address mapping schemes

Issue - State: open - Opened by ahmed-shafik almost 11 years ago - 1 comment

#38 - Generating Trace files for DRAMSim2

Issue - State: open - Opened by tmm77 almost 11 years ago

#37 - Error in long run cycles (double free or corruption )

Issue - State: open - Opened by ahmed-shafik almost 11 years ago - 3 comments

#36 - Not C++ Question...logic one

Issue - State: open - Opened by ahmed-shafik about 11 years ago - 2 comments

#35 - cannot view the data after adding to vector

Issue - State: closed - Opened by ahmed-shafik about 11 years ago - 1 comment

#34 - cannot create a new Transaction object

Issue - State: closed - Opened by ahmed-shafik about 11 years ago

#33 - Error in Inserting in 3d Transaction vector

Issue - State: closed - Opened by ahmed-shafik about 11 years ago - 1 comment

#32 - DRAMSim2 Trace Mode not using all transactions

Issue - State: closed - Opened by sfx1999 over 11 years ago - 5 comments

#31 - Transaction vector error

Issue - State: closed - Opened by ahmed-shafik over 11 years ago - 7 comments

#30 - DRAMSim2 with GEM5 FS mode

Issue - State: open - Opened by hassahma over 11 years ago - 4 comments

#29 - the latency histogram in the output file only contains read latency?

Issue - State: open - Opened by chenxiancool over 11 years ago - 6 comments

#28 - Request size for transaction

Issue - State: open - Opened by anikau31 over 11 years ago - 1 comment

#27 - rowbuffer hit rate issue

Issue - State: open - Opened by zhuzongwei almost 12 years ago - 1 comment

#26 - Running the trace based simulation

Issue - State: closed - Opened by eng-ahmed-shafik almost 12 years ago - 4 comments

#25 - Integrate MARSSX86 With DRAMSim2 on Cigwin

Issue - State: closed - Opened by eng-ahmed-shafik almost 12 years ago - 2 comments

#24 - NUM_RANKS and NUM_BANKS are shared among different MemorySystems

Issue - State: closed - Opened by x-y-z almost 12 years ago - 13 comments

#23 - configure and libtool

Pull Request - State: closed - Opened by smirolo almost 12 years ago - 13 comments

#22 - Memory leak in BusPacket.cpp

Issue - State: closed - Opened by saurabg about 12 years ago - 3 comments

#21 - DramSim2 get parameters from MARSSx86

Issue - State: closed - Opened by SunnyBeike about 12 years ago - 3 comments

#20 - Row Buffer Miss

Issue - State: open - Opened by SunnyBeike about 12 years ago - 8 comments

#19 - Integrating Gem5 with dramsim2

Issue - State: closed - Opened by rizwana-043 about 12 years ago - 26 comments

#18 - IniReader.cpp typo

Issue - State: closed - Opened by rioshering over 12 years ago - 1 comment

#17 - #define READ_TO_PRE_DELAY

Issue - State: closed - Opened by rioshering over 12 years ago - 1 comment

#16 - DRAMSim2 data_storage transaction identification

Issue - State: closed - Opened by adki over 12 years ago - 1 comment

#15 - DRAMSim2 data_storage addTransaction arguments

Issue - State: open - Opened by adki over 12 years ago - 1 comment

#14 - DRAMSim2 data_storage branch read mismatch

Issue - State: open - Opened by adki over 12 years ago - 5 comments

#13 - Partial access

Issue - State: closed - Opened by adki over 12 years ago - 5 comments

#12 - Address not aligned warnings from DRAMSim2 with Marss

Issue - State: open - Opened by pjh over 12 years ago - 2 comments

#11 - Unable to add extra fields in any class

Issue - State: closed - Opened by ghost over 12 years ago - 4 comments

#10 - CSV output for multiple channels broken

Issue - State: closed - Opened by dramninjasUMD over 12 years ago - 1 comment

#9 - Regarding MARSS+DRAMSIm2 interface

Issue - State: closed - Opened by techmanu2009 almost 13 years ago - 5 comments

#8 - Rank.cpp loop index bug

Issue - State: closed - Opened by DaveRobe over 13 years ago - 2 comments

#7 - Cannot find library

Issue - State: closed - Opened by taejunham over 13 years ago - 2 comments

#6 - Build issue in Mac OS X Snow Leopard

Issue - State: closed - Opened by jwilso over 13 years ago - 8 comments

#5 - Need to remove invalid mapping schemes

Issue - State: closed - Opened by dramninjasUMD over 13 years ago

#4 - Question

Issue - State: closed - Opened by taejunham over 13 years ago - 1 comment

#3 - TOTAL_ROW_ACCESSES causes queue blockage

Issue - State: closed - Opened by DaveRobe over 13 years ago - 4 comments

#2 - MARSS unbounded Transaction Queue causing ridiculous latency numbers

Issue - State: closed - Opened by dramninjasUMD over 14 years ago - 9 comments

#1 - Memory Leak in BusPacket handling

Issue - State: closed - Opened by dramninjasUMD over 14 years ago - 1 comment

GitHub / umd-memsys/DRAMSim2 issues and pull requests