Ecosyste.ms: Issues
An open API service for providing issue and pull request metadata for open source projects.
GitHub / steveicarus/iverilog issues and pull requests
#1180 - Cryptic error messages when trying to use packed and unpacked array parameters
Issue -
State: open - Opened by cousteaulecommandant 4 days ago
#1178 - Support repeat concatenation nets in module inout port connections
Issue -
State: open - Opened by mkorbel1 17 days ago
- 1 comment
#1177 - implicit bit extension of signed value of bitwise operator is different from standard
Issue -
State: closed - Opened by jskimphys 23 days ago
- 1 comment
#1171 - Icarus freezes when analyzing program
Issue -
State: open - Opened by joaovam about 2 months ago
- 5 comments
Labels: Enhancement
#1169 - Warning of missing drive by constant 0
Issue -
State: closed - Opened by jiangshuirou 2 months ago
- 5 comments
Labels: Need info
#1157 - vvp hangs forever on msys2 but does not on linux
Issue -
State: open - Opened by Kreijstal 3 months ago
- 25 comments
Labels: Need info
#1140 - No error or warning reported when a vector lsb or msb value contains `x` or `z` bits
Issue -
State: open - Opened by Adivinedude 5 months ago
- 9 comments
Labels: Bug
#1133 - Adding signal output will cause abnormal simulation output in iverilog
Issue -
State: closed - Opened by Noah-S-E 6 months ago
- 3 comments
#1132 - The simulation of iverilog and other tools is inconsistent
Issue -
State: closed - Opened by Noah-S-E 6 months ago
- 1 comment
#1106 - Guard against overflow / wrap around of internal bit address
Pull Request -
State: closed - Opened by daglem 8 months ago
- 7 comments
#1075 - OSSFuzz Integration
Issue -
State: open - Opened by capuanob 10 months ago
- 17 comments
Labels: Enhancement
#536 - SV: support reading/writing a slice of an unpacked array
Issue -
State: open - Opened by zachjs over 3 years ago
- 2 comments
Labels: Enhancement
#100 - DPI support is missing
Issue -
State: closed - Opened by olofk over 8 years ago
- 4 comments
Labels: Enhancement
#100 - DPI support is missing
Issue -
State: closed - Opened by olofk over 8 years ago
- 4 comments
Labels: Enhancement
#99 - Run time error? internal error
Issue -
State: closed - Opened by aolofsson over 8 years ago
- 5 comments
#99 - Run time error? internal error
Issue -
State: closed - Opened by aolofsson over 8 years ago
- 5 comments
#98 - Inheritance core dump
Issue -
State: closed - Opened by matthamptonasic over 8 years ago
- 4 comments
#98 - Inheritance core dump
Issue -
State: closed - Opened by matthamptonasic over 8 years ago
- 4 comments
#97 - System verilog Port Declaration Problem
Issue -
State: closed - Opened by red0bear over 8 years ago
- 4 comments
#96 - Using a dynamic delay causes an assertion fail
Issue -
State: closed - Opened by goekce over 8 years ago
- 1 comment
#96 - Using a dynamic delay causes an assertion fail
Issue -
State: closed - Opened by goekce over 8 years ago
- 1 comment
#95 - vhdlpp: Specify lifetime for variables.
Pull Request -
State: closed - Opened by orsonmmz over 8 years ago
#95 - vhdlpp: Specify lifetime for variables.
Pull Request -
State: closed - Opened by orsonmmz over 8 years ago
#94 - Parameter used in assignment sizing
Issue -
State: closed - Opened by matthamptonasic over 8 years ago
- 5 comments
#94 - Parameter used in assignment sizing
Issue -
State: closed - Opened by matthamptonasic over 8 years ago
- 5 comments
#93 - -Wimplicit-dimensions and output reg
Issue -
State: closed - Opened by ravenexp over 8 years ago
- 2 comments
#92 - Vhdlpp fixes
Pull Request -
State: closed - Opened by orsonmmz over 8 years ago
#91 - Missing symbols in ivl.def
Issue -
State: closed - Opened by pojakobsen over 8 years ago
- 1 comment
#91 - Missing symbols in ivl.def
Issue -
State: closed - Opened by pojakobsen over 8 years ago
- 1 comment
#90 - Subprogram overloading
Pull Request -
State: closed - Opened by orsonmmz over 8 years ago
#89 - Inferring latches
Issue -
State: closed - Opened by ghost almost 9 years ago
- 23 comments
#88 - 'image attribute
Pull Request -
State: closed - Opened by orsonmmz almost 9 years ago
#88 - 'image attribute
Pull Request -
State: closed - Opened by orsonmmz almost 9 years ago
#87 - What's the proper name of this software?
Issue -
State: closed - Opened by krytarowski almost 9 years ago
- 18 comments
#86 - Basic support for std.textio/ieee.std_logic_textio
Pull Request -
State: closed - Opened by orsonmmz almost 9 years ago
#86 - Basic support for std.textio/ieee.std_logic_textio
Pull Request -
State: closed - Opened by orsonmmz almost 9 years ago
#85 - Possible race condition with `make install`
Issue -
State: closed - Opened by dunn almost 9 years ago
- 4 comments
#85 - Possible race condition with `make install`
Issue -
State: closed - Opened by dunn almost 9 years ago
- 4 comments
#84 - Would you mind I update the README.txt to markdown format?
Issue -
State: closed - Opened by brxue about 9 years ago
- 1 comment
#84 - Would you mind I update the README.txt to markdown format?
Issue -
State: closed - Opened by brxue about 9 years ago
- 1 comment
#83 - Fix 3 compiler warnings
Pull Request -
State: closed - Opened by chrta about 9 years ago
#82 - Make a few constructors explicit.
Pull Request -
State: closed - Opened by chrta about 9 years ago
#81 - uninitialized default_dir_ in NetPins::devirtualize_pins
Issue -
State: closed - Opened by ghost about 9 years ago
- 2 comments
#80 - Unexpected behaviour of events edge triggered on register value
Issue -
State: closed - Opened by sultanqasim about 9 years ago
- 2 comments
#79 - Assert fails on invalid Verilog input
Issue -
State: closed - Opened by cliffordwolf about 9 years ago
- 1 comment
#78 - Auto-detection of version number
Issue -
State: closed - Opened by xyproto about 9 years ago
- 9 comments
#78 - Auto-detection of version number
Issue -
State: closed - Opened by xyproto about 9 years ago
- 9 comments
#77 - Wrong version syntax in driver-vpi/Makefile.in
Issue -
State: closed - Opened by themperek about 9 years ago
- 3 comments
#77 - Wrong version syntax in driver-vpi/Makefile.in
Issue -
State: closed - Opened by themperek about 9 years ago
- 3 comments
#76 - Fixes for br985, br986, br987
Pull Request -
State: closed - Opened by orsonmmz over 9 years ago
#76 - Fixes for br985, br986, br987
Pull Request -
State: closed - Opened by orsonmmz over 9 years ago
#75 - please add a simple option for dumping *all* arrays in a design
Issue -
State: closed - Opened by kwantam over 9 years ago
- 8 comments
#75 - please add a simple option for dumping *all* arrays in a design
Issue -
State: closed - Opened by kwantam over 9 years ago
- 8 comments
#74 - NOT accuracy when mix block & non-block assignment
Issue -
State: closed - Opened by balanx over 9 years ago
- 6 comments
#74 - NOT accuracy when mix block & non-block assignment
Issue -
State: closed - Opened by balanx over 9 years ago
- 6 comments
#73 - vpi: tri bus split
Issue -
State: closed - Opened by themperek over 9 years ago
- 3 comments
#73 - vpi: tri bus split
Issue -
State: closed - Opened by themperek over 9 years ago
- 3 comments
#72 - Bug: Wrong number of arguments error on expansion of macro with default arguments
Issue -
State: closed - Opened by kraigher over 9 years ago
- 1 comment
#72 - Bug: Wrong number of arguments error on expansion of macro with default arguments
Issue -
State: closed - Opened by kraigher over 9 years ago
- 1 comment
#71 - Procedure calls
Pull Request -
State: closed - Opened by orsonmmz over 9 years ago
#71 - Procedure calls
Pull Request -
State: closed - Opened by orsonmmz over 9 years ago
#70 - Time expressions for vhdlpp
Pull Request -
State: closed - Opened by orsonmmz over 9 years ago
- 3 comments
#70 - Time expressions for vhdlpp
Pull Request -
State: closed - Opened by orsonmmz over 9 years ago
- 3 comments
#69 - Various fixes
Pull Request -
State: closed - Opened by orsonmmz over 9 years ago
#68 - RAM simulation mismatch
Issue -
State: closed - Opened by wluker over 9 years ago
- 2 comments
#67 - Boolean & asserts for vhdlpp
Pull Request -
State: closed - Opened by orsonmmz over 9 years ago
#67 - Boolean & asserts for vhdlpp
Pull Request -
State: closed - Opened by orsonmmz over 9 years ago
#66 - Add travis-ci integration (linux + windows)
Pull Request -
State: closed - Opened by themperek over 9 years ago
- 5 comments
#66 - Add travis-ci integration (linux + windows)
Pull Request -
State: closed - Opened by themperek over 9 years ago
- 5 comments
#65 - Fails to compile
Issue -
State: closed - Opened by ghost over 9 years ago
- 3 comments
#65 - Fails to compile
Issue -
State: closed - Opened by ghost over 9 years ago
- 3 comments
#64 - Pause Resume doesn't work twice in a row because the handler gets removed.
Issue -
State: closed - Opened by knightpraetor over 9 years ago
- 23 comments
#64 - Pause Resume doesn't work twice in a row because the handler gets removed.
Issue -
State: closed - Opened by knightpraetor over 9 years ago
- 23 comments
#63 - Pause Resume functionality.
Issue -
State: closed - Opened by knightpraetor over 9 years ago
#63 - Pause Resume functionality.
Issue -
State: closed - Opened by knightpraetor over 9 years ago
#62 - assert on invalid verilog input
Issue -
State: closed - Opened by cliffordwolf over 9 years ago
- 1 comment
#62 - assert on invalid verilog input
Issue -
State: closed - Opened by cliffordwolf over 9 years ago
- 1 comment
#61 - Asserts
Pull Request -
State: closed - Opened by orsonmmz over 9 years ago
#61 - Asserts
Pull Request -
State: closed - Opened by orsonmmz over 9 years ago
#60 - yosys test repwhile causes crash
Issue -
State: closed - Opened by frznchckn over 9 years ago
- 4 comments
#60 - yosys test repwhile causes crash
Issue -
State: closed - Opened by frznchckn over 9 years ago
- 4 comments
#59 - VPI: update
Issue -
State: closed - Opened by themperek over 9 years ago
- 4 comments
#58 - unability to async-reset wide registers to non-zero value
Issue -
State: closed - Opened by ghost over 9 years ago
- 28 comments
#57 - bugfix #942: VHDL function bodies in arch declaration not supported
Pull Request -
State: closed - Opened by orsonmmz over 9 years ago
#57 - bugfix #942: VHDL function bodies in arch declaration not supported
Pull Request -
State: closed - Opened by orsonmmz over 9 years ago
#56 - Expfunc
Pull Request -
State: closed - Opened by orsonmmz over 9 years ago
#56 - Expfunc
Pull Request -
State: closed - Opened by orsonmmz over 9 years ago
#55 - Const record
Pull Request -
State: closed - Opened by orsonmmz over 9 years ago
#54 - Update
Pull Request -
State: closed - Opened by orsonmmz over 9 years ago
#53 - {256'b0}[ADDR-1:0]; Syntax error
Issue -
State: closed - Opened by abhisheietk over 9 years ago
- 5 comments
#52 - Unbounded vectors in VHDL functions.
Pull Request -
State: closed - Opened by orsonmmz almost 10 years ago
#51 - Vhdl range func
Pull Request -
State: closed - Opened by orsonmmz almost 10 years ago
- 2 comments
#50 - Unpacked arrays extension
Pull Request -
State: closed - Opened by orsonmmz almost 10 years ago
#49 - Support for dynamic arrays in the VPI
Pull Request -
State: closed - Opened by orsonmmz almost 10 years ago
#48 - SystemVerilog 'b0 construct for flexible padding?
Issue -
State: closed - Opened by mbsullivan about 10 years ago
- 1 comment
#47 - Expression concatenation in VHDL
Pull Request -
State: closed - Opened by orsonmmz about 10 years ago
#46 - VHDL attributes: 'range, 'reverse_range, 'left & 'right
Pull Request -
State: closed - Opened by orsonmmz about 10 years ago
#45 - Subprograms
Pull Request -
State: closed - Opened by orsonmmz about 10 years ago
#44 - gperf generated code fails debug build with CFLAGS/CXXFLAGS="-O0 -g"
Issue -
State: closed - Opened by ghost about 10 years ago
- 5 comments
#43 - Elaboration & emit functions for aggregate expressions used as record initializers.
Pull Request -
State: closed - Opened by orsonmmz about 10 years ago
- 6 comments