Ecosyste.ms: Issues
An open API service for providing issue and pull request metadata for open source projects.
GitHub / riscv/riscv-isa-manual issues and pull requests
#47 - define stval and mtval for all traps
Issue -
State: closed - Opened by aswaterman almost 8 years ago
- 1 comment
#46 - Misaligned loads/stores and LR/SC on I/O regions should generate PMA violation (access) exceptions
Issue -
State: closed - Opened by aswaterman almost 8 years ago
- 1 comment
#45 - Feedback Comments for C spec
Issue -
State: closed - Opened by hirooih almost 8 years ago
- 5 comments
#44 - Inconsistency on the Stack Pointer Alignment Specification
Issue -
State: closed - Opened by hirooih almost 8 years ago
- 2 comments
#43 - Guidance requested: instruction for spin-wait loops
Issue -
State: closed - Opened by sorear almost 8 years ago
- 3 comments
Labels: Unprivileged ISA Spec Extensions
#42 - Locking idioms are incomplete
Issue -
State: closed - Opened by sorear almost 8 years ago
- 5 comments
#41 - Document device tree binding
Issue -
State: closed - Opened by sorear almost 8 years ago
- 3 comments
#40 - Clarify that virtual and physical address space are circular
Issue -
State: closed - Opened by sorear almost 8 years ago
- 4 comments
Labels: Base ISA Ratification
#39 - Clarify WFI w.r.t. interrupt delegation
Pull Request -
State: closed - Opened by aswaterman almost 8 years ago
- 1 comment
#38 - Document 1.10 SBI
Issue -
State: closed - Opened by sorear almost 8 years ago
- 1 comment
#37 - Behavior of WFI when interrupts are implicitly disabled by privilege level
Issue -
State: closed - Opened by sorear almost 8 years ago
- 2 comments
#36 - Commentary on 'mtval' refers to 'mtbadinst' instead of 'mtval'
Pull Request -
State: closed - Opened by michaeljclark almost 8 years ago
- 1 comment
#35 - Classify and advertise optional feature under standard extensions
Issue -
State: closed - Opened by Ilanpardo almost 8 years ago
- 3 comments
#34 - Any write to misa may cause UXL or SXL to change as a side effect
Pull Request -
State: closed - Opened by aswaterman almost 8 years ago
- 3 comments
#33 - Specify encoding of mvendorid field
Pull Request -
State: closed - Opened by aswaterman almost 8 years ago
- 4 comments
#32 - Replace RISC-V specific Vendor ID in mvendorid with JEDEC manufacturer ID
Issue -
State: closed - Opened by kasanovic almost 8 years ago
- 7 comments
Labels: Priv ISA Spec
#31 - Cimm
Pull Request -
State: closed - Opened by DSHorner almost 8 years ago
- 2 comments
#30 - FMV.X.D and FSD on single-precision values
Issue -
State: closed - Opened by aswaterman almost 8 years ago
- 21 comments
#29 - C nits
Issue -
State: closed - Opened by sorear almost 8 years ago
- 8 comments
#28 - Inconsistency between vl table and text
Issue -
State: closed - Opened by asb almost 8 years ago
#27 - Make two's complement explicit early on (in introduction).
Pull Request -
State: closed - Opened by DSHorner almost 8 years ago
- 3 comments
#26 - mideleg/medeleg should not exist if S-mode (or U-mode + N extension) is not implemented
Issue -
State: closed - Opened by aswaterman almost 8 years ago
- 1 comment
#25 - Add rationale for divide-by-zero choice
Issue -
State: closed - Opened by kasanovic almost 8 years ago
- 3 comments
Labels: Unprivileged ISA Spec Extensions
#24 - rename *ptbr to *atp?
Issue -
State: closed - Opened by kasanovic almost 8 years ago
- 6 comments
Labels: Priv ISA Spec
#23 - Should we remove CSR shadow register convention?
Issue -
State: closed - Opened by kasanovic almost 8 years ago
- 3 comments
Labels: Priv ISA Spec
#22 - Revisit C spec and push forward from v1.9 -> 2.0
Issue -
State: closed - Opened by kasanovic almost 8 years ago
- 1 comment
Labels: C Extension
#21 - One liners to correct register designation in rvc-instr-table
Pull Request -
State: closed - Opened by David-Horner almost 8 years ago
- 2 comments
#20 - Should base field in misa be renamed to MXL for consistency?
Issue -
State: closed - Opened by kasanovic almost 8 years ago
- 2 comments
Labels: Priv ISA Spec
#19 - MXR for PMPs, not just paging?
Issue -
State: closed - Opened by aswaterman almost 8 years ago
- 4 comments
#18 - sstatus/mstatus SPV bit
Issue -
State: closed - Opened by aswaterman almost 8 years ago
- 5 comments
Labels: Priv ISA Spec
#17 - Make WFI M-mode-only, or add an mstatus bit to trap WFI
Issue -
State: closed - Opened by aswaterman almost 8 years ago
- 4 comments
Labels: Priv ISA Spec
#16 - Document `N' extension
Issue -
State: closed - Opened by aswaterman almost 8 years ago
- 4 comments
Labels: Unprivileged ISA Spec Extensions
#15 - Add commentary explaining removal of Mbb
Issue -
State: closed - Opened by aswaterman about 8 years ago
- 3 comments
Labels: Priv ISA Spec
#14 - Permit PTE A/D bits to be updated by either software or hardware?
Issue -
State: closed - Opened by aswaterman about 8 years ago
#13 - Interrupt/Exception Priorities
Issue -
State: closed - Opened by kasanovic about 8 years ago
- 10 comments
Labels: Priv ISA Spec, Interrupts
#12 - Consider adding mbadinst CSR
Issue -
State: closed - Opened by aswaterman about 8 years ago
- 24 comments
Labels: Priv ISA Spec
#11 - Ordering of A/D bits to PTE reads
Issue -
State: closed - Opened by aswaterman about 8 years ago
- 2 comments
Labels: Priv ISA Spec
#10 - mhcounteren -> mcounteren; mucounteren -> scounteren
Issue -
State: closed - Opened by aswaterman about 8 years ago
- 2 comments
Labels: Priv ISA Spec
#9 - Reconsider SFENCE.VM/ASIDs
Issue -
State: closed - Opened by aswaterman about 8 years ago
- 4 comments
Labels: Priv ISA Spec
#8 - precise traps on misaligned accesses for PMAs without misaligned accesses in M-mode
Issue -
State: closed - Opened by aswaterman about 8 years ago
- 1 comment
Labels: Priv ISA Spec
#7 - Support delegation of machine timer & software interrupts to S-mode
Issue -
State: closed - Opened by aswaterman about 8 years ago
- 2 comments
Labels: Priv ISA Spec, Interrupts
#6 - Reserve mtvec[1:0], stvec[1:0] for future vectored interrupt/exception extension
Issue -
State: closed - Opened by aswaterman about 8 years ago
- 2 comments
Labels: Priv ISA Spec, Interrupts
#5 - Remove H-mode for now
Issue -
State: closed - Opened by aswaterman about 8 years ago
- 2 comments
Labels: Priv ISA Spec
#4 - Move VM configuration into SPTBR
Issue -
State: closed - Opened by aswaterman about 8 years ago
- 2 comments
Labels: Priv ISA Spec
#3 - Global trap-enables instead of interrupt-enables
Issue -
State: closed - Opened by aswaterman about 8 years ago
- 5 comments
Labels: Priv ISA Spec
#2 - Specify PMPs
Issue -
State: closed - Opened by aswaterman about 8 years ago
- 4 comments
Labels: Priv ISA Spec
#1 - Codify notion of M-mode profiles
Issue -
State: closed - Opened by aswaterman about 8 years ago
- 9 comments
Labels: Priv ISA Spec