Ecosyste.ms: Issues
An open API service for providing issue and pull request metadata for open source projects.
GitHub / pymtl/pymtl3 issues and pull requests
#287 - The reset schemes of pymtl3 Component
Issue -
State: closed - Opened by EveandBob about 1 month ago
- 1 comment
#286 - Error with data slicing from mk_bits(): TypeError: 'type' object is not subscriptable
Issue -
State: closed - Opened by kevinyuan 2 months ago
- 1 comment
#285 - pluggy._manager.PluginValidationError: unknown hook 'pytest_cmdline_preparse'
Issue -
State: closed - Opened by kevinyuan 2 months ago
- 2 comments
#284 - Fix deprecated ast warning
Pull Request -
State: open - Opened by KelvinChung2000 4 months ago
#283 - pytest_cmdline_preparse deprecated
Issue -
State: closed - Opened by KelvinChung2000 4 months ago
- 2 comments
#282 - Cycle Level simulation reset function not right
Issue -
State: closed - Opened by CaseyZhu 4 months ago
- 1 comment
#281 - Bitwidth-mismatch check failed on customized bitstruct
Issue -
State: closed - Opened by Aegithalos-caudatus 7 months ago
- 4 comments
#280 - Bit-replicate operator support
Issue -
State: closed - Opened by Aegithalos-caudatus 9 months ago
- 2 comments
#279 - Unable to use concat with InPort
Issue -
State: closed - Opened by KelvinChung2000 9 months ago
- 19 comments
#278 - Improving concat
Pull Request -
State: open - Opened by KelvinChung2000 9 months ago
#277 - fixing verilog placeholder pass
Pull Request -
State: open - Opened by KelvinChung2000 9 months ago
- 3 comments
#276 - Using enum for design
Issue -
State: closed - Opened by KelvinChung2000 10 months ago
- 3 comments
#275 - Improve index handling in Bits and Signal classes
Pull Request -
State: closed - Opened by KelvinChung2000 10 months ago
- 5 comments
#274 - Adding fst and struct trace support
Pull Request -
State: open - Opened by KelvinChung2000 11 months ago
- 6 comments
#273 - TypeError with Verilator simulation flow
Issue -
State: closed - Opened by KelvinChung2000 11 months ago
- 2 comments
#272 - Adding __len__ interface and formatting to black
Pull Request -
State: closed - Opened by KelvinChung2000 11 months ago
- 2 comments
#271 - RTL pass fail to tell value used is constant
Issue -
State: open - Opened by KelvinChung2000 11 months ago
- 6 comments
#270 - RTL gen pass fail to catch all System Verilog keyword
Issue -
State: open - Opened by KelvinChung2000 11 months ago
- 5 comments
#269 - Incorrect VCD file format
Issue -
State: open - Opened by KelvinChung2000 12 months ago
- 3 comments
#268 - Where is the tutorial?
Issue -
State: closed - Opened by chensx00 12 months ago
- 1 comment
#267 - Bump cryptography from 41.0.6 to 42.0.4 in /requirements
Pull Request -
State: open - Opened by dependabot[bot] 12 months ago
- 1 comment
Labels: dependencies
#266 - Bump cryptography from 41.0.6 to 42.0.2 in /requirements
Pull Request -
State: closed - Opened by dependabot[bot] about 1 year ago
- 2 comments
Labels: dependencies
#265 - Bump cryptography from 41.0.6 to 42.0.0 in /requirements
Pull Request -
State: closed - Opened by dependabot[bot] about 1 year ago
- 2 comments
Labels: dependencies
#264 - PyMTL4.0 Release
Pull Request -
State: open - Opened by ptpan about 1 year ago
- 1 comment
#263 - Feature consideration?
Issue -
State: open - Opened by KelvinChung2000 about 1 year ago
- 22 comments
Labels: enhancement
#262 - Add support for Verilator assertion
Pull Request -
State: closed - Opened by ptpan about 1 year ago
#261 - Renaming ports and signals to ensure a consistent naming convention
Pull Request -
State: closed - Opened by ptpan about 1 year ago
- 1 comment
#260 - Add support for non-s args to refer to self
Pull Request -
State: closed - Opened by ptpan about 1 year ago
- 3 comments
#259 - Use better error message when slicing a Bitstruct signal
Pull Request -
State: closed - Opened by ptpan about 1 year ago
#258 - Inconsistent simulation
Issue -
State: closed - Opened by KelvinChung2000 about 1 year ago
- 5 comments
#257 - Incorrect range elaboration
Issue -
State: closed - Opened by KelvinChung2000 about 1 year ago
- 3 comments
#256 - Bump cryptography from 41.0.4 to 41.0.6 in /requirements
Pull Request -
State: closed - Opened by dependabot[bot] about 1 year ago
- 1 comment
Labels: dependencies
#255 - Driver with signals are shown as no drivers
Issue -
State: closed - Opened by KelvinChung2000 about 1 year ago
- 6 comments
#254 - Verilog import fixes and revamp
Pull Request -
State: closed - Opened by ptpan about 1 year ago
#253 - Support test-by-specification on external Verilog modules
Pull Request -
State: closed - Opened by ptpan over 1 year ago
#252 - Bump cryptography from 3.3.2 to 41.0.4 in /requirements
Pull Request -
State: closed - Opened by dependabot[bot] over 1 year ago
- 1 comment
Labels: dependencies
#251 - Support parallel Verilog co-simulation through pytest-xdist
Pull Request -
State: closed - Opened by ptpan over 1 year ago
#250 - Fixing dependency on the py module during pip installation
Pull Request -
State: closed - Opened by ptpan over 1 year ago
- 1 comment
#249 - Port the bitstruct packed array bug fix to master branch
Pull Request -
State: closed - Opened by ptpan over 1 year ago
- 1 comment
#248 - Fix Bug Caused By Struct with List Field
Pull Request -
State: closed - Opened by yo96 over 1 year ago
- 2 comments
Labels: bug
#247 - 94 tests fail
Issue -
State: closed - Opened by yurivict over 1 year ago
- 1 comment
#246 - pytest should't be in install_requires in seup.py
Issue -
State: open - Opened by yurivict over 1 year ago
- 1 comment
#245 - Add custom verilator pass arguments for --trace-max-width and --trace-max-array.
Pull Request -
State: closed - Opened by UnsignedByte almost 2 years ago
- 1 comment
#244 - Add line trace to stream-to-FL adapters
Pull Request -
State: closed - Opened by ptpan almost 2 years ago
#243 - Add non-blocking stream FL adapters
Pull Request -
State: closed - Opened by ptpan almost 2 years ago
#242 - Fixing double/single underscore issue in translation
Pull Request -
State: closed - Opened by ptpan almost 2 years ago
#241 - Bump cryptography from 3.3.2 to 39.0.1 in /requirements
Pull Request -
State: closed - Opened by dependabot[bot] about 2 years ago
- 3 comments
Labels: dependencies
#240 - Verilator compile error
Issue -
State: closed - Opened by hmohajeri about 2 years ago
- 4 comments
#239 - StreamSourceFL, StreamSinkFL missing.
Issue -
State: closed - Opened by hmohajeri about 2 years ago
- 4 comments
#238 - README Verilator sentences
Issue -
State: closed - Opened by yihuajack over 2 years ago
- 1 comment
#237 - PyMTL 4.0 release staging
Pull Request -
State: closed - Opened by ptpan over 2 years ago
- 2 comments
#236 - Fix dependency on the py module
Pull Request -
State: closed - Opened by ptpan over 2 years ago
- 1 comment
#235 - Toggle signals after 1/10 of clock period instead on negedge during Verilator VCD dump
Pull Request -
State: closed - Opened by ptpan over 2 years ago
#234 - [mem] Add out-of-bound detect to behavioral memory
Pull Request -
State: closed - Opened by ptpan over 2 years ago
#233 - Verilator 4.228 support
Pull Request -
State: closed - Opened by ptpan over 2 years ago
#232 - GitHub Actions: Add Python 3.10 and 3.11 to testing
Pull Request -
State: closed - Opened by cclauss over 2 years ago
- 2 comments
#231 - get tests running on ProcFL
Pull Request -
State: closed - Opened by cbatten over 2 years ago
#230 - ECE4750 2022
Pull Request -
State: closed - Opened by ptpan over 2 years ago
- 2 comments
#229 - Failed to compile Verilator 4.224
Issue -
State: closed - Opened by metoofan over 2 years ago
- 1 comment
#228 - Fixing subscript error with array of ifcs
Pull Request -
State: closed - Opened by ptpan almost 3 years ago
- 1 comment
#227 - Add default values to cmdline_opts
Pull Request -
State: closed - Opened by ptpan almost 3 years ago
- 1 comment
#226 - Add --test-yosys-verilog to pytest plugin
Pull Request -
State: closed - Opened by ptpan almost 3 years ago
- 2 comments
#225 - Add --dump-textwave option to the pytest plugin
Pull Request -
State: closed - Opened by ptpan almost 3 years ago
- 1 comment
#224 - Add a Resetable RegisterFile to stdlib basic rtl
Pull Request -
State: closed - Opened by jbrzozo24 almost 3 years ago
- 8 comments
#223 - [stdlib] fix val/rdy autoconnect
Pull Request -
State: closed - Opened by yo96 almost 3 years ago
- 4 comments
#222 - [translation] Move clk/reset connections ahead within ifndef SYNTHESIS
Pull Request -
State: closed - Opened by ptpan almost 3 years ago
- 2 comments
#221 - Add support for changing toplevel module name through macro definition
Pull Request -
State: closed - Opened by ptpan about 3 years ago
- 1 comment
#220 - Suppress data_too_large warning from hypothesis in datatype tests
Pull Request -
State: closed - Opened by ptpan about 3 years ago
- 1 comment
#219 - Fix vtb for arrays of vector ports
Pull Request -
State: closed - Opened by ptpan about 3 years ago
- 1 comment
#218 - Example fails: type object 'NamedObject' has no attribute '_elaborate_stack'
Issue -
State: closed - Opened by yurivict about 3 years ago
- 1 comment
#217 - Add codecov to CI
Pull Request -
State: closed - Opened by ptpan over 3 years ago
- 1 comment
#216 - Merge changes during ECE5745 2021
Pull Request -
State: closed - Opened by jsn1993 over 3 years ago
- 2 comments
#215 - Add github action for CI
Pull Request -
State: closed - Opened by jsn1993 over 3 years ago
#214 - Support 3.7, 3.8. 3,9, 3.10 using one copy of codebase
Pull Request -
State: closed - Opened by jsn1993 over 3 years ago
- 2 comments
#213 - [VcdGen] Fix vcdwave in default pass
Pull Request -
State: closed - Opened by ptpan almost 4 years ago
#212 - bypass queues should now support non-power-of-2 sizes
Pull Request -
State: closed - Opened by nfc35 almost 4 years ago
- 3 comments
#211 - [CI] Disable pypy CI job
Pull Request -
State: closed - Opened by ptpan almost 4 years ago
#210 - Display port name correctly on error in run_test_vector_sim
Pull Request -
State: closed - Opened by cbatten almost 4 years ago
#209 - [Fix] Honor non-top port maps in subcomp declarations
Pull Request -
State: closed - Opened by ptpan almost 4 years ago
- 1 comment
#208 - Add on-demand VCD support to model config
Pull Request -
State: closed - Opened by ptpan almost 4 years ago
#207 - On-demand VCD dumping
Pull Request -
State: closed - Opened by ptpan almost 4 years ago
- 2 comments
#206 - Bump cryptography from 3.0 to 3.3.2 in /requirements
Pull Request -
State: closed - Opened by dependabot[bot] almost 4 years ago
- 1 comment
Labels: dependencies
#205 - cryptography pypy workaround
Pull Request -
State: closed - Opened by ptpan almost 4 years ago
- 1 comment
#204 - Always honor explicit_module_name
Pull Request -
State: closed - Opened by ptpan almost 4 years ago
- 1 comment
#203 - save pickled file as string
Pull Request -
State: closed - Opened by jsn1993 almost 4 years ago
- 1 comment
#202 - [VTB] Check for X on DUT interface
Pull Request -
State: closed - Opened by ptpan about 4 years ago
- 1 comment
#201 - tbgen set values during reset
Pull Request -
State: closed - Opened by jsn1993 over 4 years ago
- 2 comments
#200 - Fix out-of-bound index in verilog_cmp
Pull Request -
State: closed - Opened by ptpan over 4 years ago
- 1 comment
#199 - Fix a placeholder caching issue
Pull Request -
State: closed - Opened by ptpan over 4 years ago
- 2 comments
#198 - Minor translation and import bug fix
Pull Request -
State: closed - Opened by ptpan over 4 years ago
- 1 comment
#197 - Slicing non-Bits signals inside update blocks does not generate very helpful error messages
Issue -
State: closed - Opened by ptpan over 4 years ago
- 1 comment
Labels: better error message
#196 - Implement sequential & combinational ROM
Pull Request -
State: closed - Opened by jsn1993 over 4 years ago
- 1 comment
#195 - Support s.bitstruct_wire //= s.bits_wire
Issue -
State: closed - Opened by jsn1993 over 4 years ago
- 1 comment
#194 - Implement add_value_port API and fix verilator bugs and fix formatting tools
Pull Request -
State: closed - Opened by jsn1993 over 4 years ago
- 1 comment
#193 - fix verilator vcd
Pull Request -
State: closed - Opened by jsn1993 over 4 years ago
- 1 comment
#192 - fix component name with struct parameter
Pull Request -
State: closed - Opened by jsn1993 over 4 years ago
#191 - Assuming other is not Bits?
Issue -
State: closed - Opened by JimJJewett over 4 years ago
- 3 comments
#190 - Use create_req to make AMO request in MemIfcFL2CLAdapter
Pull Request -
State: closed - Opened by qtt2 over 4 years ago
- 1 comment
#189 - disable lambda block ast caching
Pull Request -
State: closed - Opened by jsn1993 over 4 years ago
- 1 comment
#188 - More backend/stdlib fixes
Pull Request -
State: closed - Opened by jsn1993 over 4 years ago
- 3 comments