openhwgroup/cvfpu issues and pull requests

#142 - inline min_fp_width into max_num_lanes to fix DC Compiler crash

Pull Request - State: closed - Opened by selimsandal 2 months ago

#141 - max_num_lanes causes Synopsys Design Compiler to segfault

Issue - State: closed - Opened by selimsandal 2 months ago - 1 comment

#140 - 🐛 Fix handling of infinity in F2F conversions

Pull Request - State: closed - Opened by michael-platzer 3 months ago

#139 - [BUG] NX flag not correctly triggered in specific cases

Issue - State: open - Opened by fly-1011 3 months ago - 7 comments

#138 - CVFPU incorrectly sets inexact flag on `F2F` conversions of infinity

Issue - State: closed - Opened by michael-platzer 3 months ago - 2 comments

#137 - 🐛 Use correct round mode in FMA underflow detection

Pull Request - State: closed - Opened by michael-platzer 4 months ago

#137 - 🐛 Use correct round mode in FMA underflow detection

Pull Request - State: closed - Opened by michael-platzer 4 months ago

#136 - 🐛 Fix non-normal addend handling in symmetric widening add

Pull Request - State: closed - Opened by michael-platzer 4 months ago

#136 - 🐛 Fix non-normal addend handling in symmetric widening add

Pull Request - State: closed - Opened by michael-platzer 4 months ago

#135 - Add FP8 and FP8ALT support to THMULTI DivSqrt

Pull Request - State: open - Opened by lucabertaccini 4 months ago

#135 - Add FP8 and FP8ALT support to THMULTI DivSqrt

Pull Request - State: open - Opened by lucabertaccini 4 months ago

#134 - :adhesive_bandage: Fix illegal Verilog `'0`

Pull Request - State: closed - Opened by zarubaf 4 months ago

#134 - :adhesive_bandage: Fix illegal Verilog `'0`

Pull Request - State: closed - Opened by zarubaf 4 months ago

#133 - Move Handshake and Aux Chain out of Opgroups

Pull Request - State: open - Opened by Lynx005F 4 months ago - 7 comments

#133 - Move Handshake and Aux Chain out of Opgroups

Pull Request - State: open - Opened by Lynx005F 4 months ago - 7 comments

#132 - ⚡️ Calculate positive and negative FMA sums in parallel

Pull Request - State: closed - Opened by michael-platzer 5 months ago - 4 comments

#132 - ⚡️ Calculate positive and negative FMA sums in parallel

Pull Request - State: closed - Opened by michael-platzer 5 months ago - 4 comments

#131 - Add FP8ALT (4,3) format support

Pull Request - State: open - Opened by lucabertaccini 5 months ago

#131 - Add FP8ALT (4,3) format support

Pull Request - State: open - Opened by lucabertaccini 5 months ago

#130 - Add FP16ALT support to THMULTI DivSqrt

Pull Request - State: closed - Opened by lucabertaccini 5 months ago

#130 - Add FP16ALT support to THMULTI DivSqrt

Pull Request - State: closed - Opened by lucabertaccini 5 months ago

#129 - ✨ Add ext reg ena to new TH 64 divsqrt unit

Pull Request - State: closed - Opened by michael-platzer 5 months ago - 2 comments

#129 - ✨ Add ext reg ena to new TH 64 divsqrt unit

Pull Request - State: closed - Opened by michael-platzer 5 months ago - 2 comments

#128 - :adhesive_bandage: Split round mode pipeline signal in verilator

Pull Request - State: closed - Opened by emustafa96 5 months ago

#128 - :adhesive_bandage: Split round mode pipeline signal in verilator

Pull Request - State: closed - Opened by emustafa96 5 months ago

#127 - ♻️ Avoid type casts & member access in parameter assignments

Pull Request - State: closed - Opened by michael-platzer 5 months ago

#127 - ♻️ Avoid type casts & member access in parameter assignments

Pull Request - State: closed - Opened by michael-platzer 5 months ago

#126 - Fix synchronization of THMULTI DivSqrt lanes when FP16ALT or FP8 are enabled

Pull Request - State: closed - Opened by lucabertaccini 5 months ago - 2 comments

#126 - Fix synchronization of THMULTI DivSqrt lanes when FP16ALT or FP8 are enabled

Pull Request - State: closed - Opened by lucabertaccini 5 months ago - 2 comments

#125 - 🐛 Fix status flags for I2F and F2I conversions

Pull Request - State: open - Opened by michael-platzer 5 months ago

#125 - 🐛 Fix status flags for I2F and F2I conversions

Pull Request - State: open - Opened by michael-platzer 5 months ago

#124 - Add new multi-format DivSqrt unit from openC910 (FP64, FP32, FP16 + SIMD support)

Pull Request - State: closed - Opened by lucabertaccini 6 months ago - 1 comment

#124 - Add new multi-format DivSqrt unit from openC910 (FP64, FP32, FP16 + SIMD support)

Pull Request - State: closed - Opened by lucabertaccini 6 months ago - 1 comment

#123 - CVFPU incorrectly suppresses overflow flag on `I2F` conversions

Issue - State: open - Opened by michael-platzer 6 months ago - 2 comments

#123 - CVFPU incorrectly suppresses overflow flag on `I2F` conversions

Issue - State: open - Opened by michael-platzer 6 months ago - 2 comments

#122 - 🐛 Fix handling of new symmetric add operation

Pull Request - State: closed - Opened by michael-platzer 6 months ago

#122 - 🐛 Fix handling of new symmetric add operation

Pull Request - State: closed - Opened by michael-platzer 6 months ago

#121 - [BUG] Incorrectly set fflags: An underflow exception is triggered when the computed result is an exact subnormal number.

Issue - State: open - Opened by fly-1011 6 months ago - 2 comments

#120 - [BUG] Incorrect fflags Set When Using fdiv Instruction to Divide by Infinity

Issue - State: open - Opened by fly-1011 6 months ago - 2 comments

#120 - [BUG] Incorrect fflags Set When Using fdiv Instruction to Divide by Infinity

Issue - State: open - Opened by fly-1011 6 months ago - 2 comments

#119 - fdiv incorrectly returns infinity when dividing by NaN

Issue - State: closed - Opened by fly-1011 6 months ago - 3 comments

#119 - fdiv incorrectly returns infinity when dividing by NaN

Issue - State: closed - Opened by fly-1011 6 months ago - 3 comments

#118 - Unexpected Result When fsqrt.s Processes Negative Floating-Point Numbers

Issue - State: closed - Opened by fly-1011 6 months ago - 4 comments

#118 - Unexpected Result When fsqrt.s Processes Negative Floating-Point Numbers

Issue - State: closed - Opened by fly-1011 6 months ago - 4 comments

#117 - SQRT operation for FP16ALT only works when all op[n] lanes are assigned to the same input

Issue - State: open - Opened by selimsandal 6 months ago - 1 comment

#117 - SQRT operation for FP16ALT only works when all op[n] lanes are assigned to the same input

Issue - State: open - Opened by selimsandal 6 months ago - 1 comment

#116 - 🩹 Fix result of not equal compare w signaling NaNs

Pull Request - State: closed - Opened by michael-platzer 6 months ago - 1 comment

#116 - 🩹 Fix result of not equal compare w signaling NaNs

Pull Request - State: closed - Opened by michael-platzer 6 months ago - 1 comment

#115 - NONCOMP clears the result bit for signaling NaNs in "not equal" compare

Issue - State: closed - Opened by michael-platzer 6 months ago - 1 comment

#115 - NONCOMP clears the result bit for signaling NaNs in "not equal" compare

Issue - State: closed - Opened by michael-platzer 6 months ago - 1 comment

#114 - ✨ Add symmetric add operation for same source FP format add/sub

Pull Request - State: closed - Opened by michael-platzer 6 months ago - 3 comments

#114 - ✨ Add symmetric add operation for same source FP format add/sub

Pull Request - State: closed - Opened by michael-platzer 6 months ago - 3 comments

#113 - Proposal: allow the FMA addend to be in either `src_fmt_i` or `dst_fmt_i`

Issue - State: closed - Opened by michael-platzer 6 months ago - 5 comments