openhwgroup/corev-llvm-project issues and pull requests

#100 - [RISCV][CV-SIMD] Fix the immediate type in the shuffle pseudo expansion.

Pull Request - State: closed - Opened by PaoloS02 11 months ago - 2 comments

#100 - [RISCV][CV-SIMD] Fix the immediate type in the shuffle pseudo expansion.

Pull Request - State: closed - Opened by PaoloS02 11 months ago - 2 comments

#99 - C API header xcvsimd and type fixes

Pull Request - State: closed - Opened by PaoloS02 11 months ago

#99 - C API header xcvsimd and type fixes

Pull Request - State: closed - Opened by PaoloS02 11 months ago

#98 - C API header xcvmac

Pull Request - State: closed - Opened by PaoloS02 11 months ago

#98 - C API header xcvmac

Pull Request - State: closed - Opened by PaoloS02 11 months ago

#97 - C API header xcvbitmanip and type fixes

Pull Request - State: closed - Opened by PaoloS02 11 months ago

#97 - C API header xcvbitmanip and type fixes

Pull Request - State: closed - Opened by PaoloS02 11 months ago

#96 - C API header xcvelw

Pull Request - State: closed - Opened by PaoloS02 11 months ago

#96 - C API header xcvelw

Pull Request - State: closed - Opened by PaoloS02 11 months ago

#95 - C API header xcvalu

Pull Request - State: closed - Opened by PaoloS02 11 months ago

#95 - C API header xcvalu

Pull Request - State: closed - Opened by PaoloS02 11 months ago

#94 - Xcvmem incompatibilities with the GCC tests

Issue - State: open - Opened by PaoloS02 11 months ago

#94 - Xcvmem incompatibilities with the GCC tests

Issue - State: open - Opened by PaoloS02 11 months ago

#93 - [RISCV][Clang] Added code to generate clang error if immediate operan…

Pull Request - State: closed - Opened by adeel10x 11 months ago - 11 comments

#92 - [RISCV][Clang] Implement XcvElw Clang Builtins

Pull Request - State: closed - Opened by realqhc 12 months ago

#92 - [RISCV][Clang] Implement XcvElw Clang Builtins

Pull Request - State: closed - Opened by realqhc 12 months ago

#91 - Fixed Instruction Selection Patterns for CoreV SIMD Insert and SIMD E…

Pull Request - State: closed - Opened by adeel10x 12 months ago - 8 comments

#90 - [RISCV] Clarify LW and SW size in Xcvmem

Pull Request - State: closed - Opened by realqhc 12 months ago

#90 - [RISCV] Clarify LW and SW size in Xcvmem

Pull Request - State: closed - Opened by realqhc 12 months ago

#89 - [RISCV] add missing xcvmem in RISCVISAInfo

Pull Request - State: closed - Opened by realqhc about 1 year ago - 3 comments

#89 - [RISCV] add missing xcvmem in RISCVISAInfo

Pull Request - State: closed - Opened by realqhc about 1 year ago - 3 comments

#88 - Add CORE-V headers

Pull Request - State: closed - Opened by PaoloS02 about 1 year ago - 2 comments

#88 - Add CORE-V headers

Pull Request - State: closed - Opened by PaoloS02 about 1 year ago - 2 comments

#87 - Fixed signedness of simd shuffle and simd avgu

Pull Request - State: closed - Opened by adeel10x about 1 year ago - 5 comments

#86 - CORE-V Hardware Loop Codegen Issues

Issue - State: open - Opened by PhilippvK about 1 year ago - 4 comments

#85 - [RISCV] Backport patch D153721

Pull Request - State: closed - Opened by PaoloS02 about 1 year ago

#84 - [RISCV][Clang] Implement Xcvmac clang builtins

Pull Request - State: closed - Opened by realqhc about 1 year ago - 1 comment

#83 - Test for rebased "fix xcvbi" PR

Pull Request - State: closed - Opened by PaoloS02 about 1 year ago

#82 - [RISCV] Update format of xcvmem instructions

Pull Request - State: closed - Opened by melonedo about 1 year ago

#81 - [RISCV] Update naming of cv.slet

Pull Request - State: closed - Opened by realqhc about 1 year ago - 1 comment

#80 - [RISCV] Backport patch D153721

Pull Request - State: closed - Opened by melonedo about 1 year ago - 4 comments

#79 - [CI] Fix the error on macOS

Pull Request - State: closed - Opened by realqhc about 1 year ago - 1 comment

#78 - [RISCV] Add CORE-V headers

Pull Request - State: closed - Opened by melonedo about 1 year ago - 3 comments

#77 - [RISCV] Fix XcvAlu assembler casing

Pull Request - State: closed - Opened by realqhc about 1 year ago - 1 comment

#76 - How to check COREV_CLUSTER for Event Load Instruction

Issue - State: closed - Opened by ChunyuLiao about 1 year ago - 1 comment

#75 - Alu builtins

Pull Request - State: closed - Opened by realqhc over 1 year ago - 2 comments

#74 - CORE-V C API Specification

Issue - State: closed - Opened by simonpcook over 1 year ago - 3 comments

#73 - Update naming for xcvmem instructions

Pull Request - State: closed - Opened by ChunyuLiao over 1 year ago - 1 comment

#72 - Naming of cv.slet

Issue - State: closed - Opened by MaryBennett over 1 year ago - 1 comment

#71 - Update naming for xcvmem instructions

Issue - State: closed - Opened by MaryBennett over 1 year ago - 1 comment

#70 - [RISCV] Implement XCValu Intrinsics

Pull Request - State: closed - Opened by realqhc over 1 year ago - 2 comments

#69 - What is the version of XCV extensions implemented here?

Issue - State: closed - Opened by realqhc over 1 year ago - 2 comments

#68 - Reverse the order of is2 and is3

Pull Request - State: closed - Opened by melonedo over 1 year ago - 1 comment

#67 - Immediate Branching related compiler crash

Issue - State: closed - Opened by PhilippvK over 1 year ago - 4 comments

#66 - Subtarget for the CV32E40P and respective tests

Pull Request - State: closed - Opened by Cecil-W over 1 year ago - 5 comments

#65 - upstream

Issue - State: open - Opened by ChunyuLiao over 1 year ago - 2 comments

#64 - [RISCV] Fix xcvbi bugs

Pull Request - State: closed - Opened by PhilippvK over 1 year ago - 10 comments

#63 - Fix xcvmem heuristic

Pull Request - State: closed - Opened by PhilippvK over 1 year ago - 3 comments

#62 - [RISCV] Update Xcvmac Pseudo Instructions

Pull Request - State: closed - Opened by realqhc over 1 year ago

#61 - cv-simd-shufflei1-sci-b-compile-1.c

Issue - State: closed - Opened by NandniJamnadas over 1 year ago - 1 comment

#60 - Builtins Implementation Status compared to GCC

Issue - State: open - Opened by realqhc over 1 year ago - 7 comments

#59 - [RISCV] Update Core-V SIMD instructions

Pull Request - State: closed - Opened by melonedo over 1 year ago - 1 comment

#58 - [RISCV][CodeGen] Implement XcvMac Intrinsics

Pull Request - State: closed - Opened by realqhc over 1 year ago

#57 - [RISCV] Implement XcvElw Intrinsics

Pull Request - State: closed - Opened by realqhc over 1 year ago - 6 comments

#56 - Update SIMD builtins

Pull Request - State: closed - Opened by melonedo over 1 year ago - 1 comment

#55 - [RISCV] Update immediate branching extension

Pull Request - State: closed - Opened by melonedo over 1 year ago - 1 comment

#54 - [RISCV] Implement Clang builtins for CORE-V bit manipulation

Pull Request - State: closed - Opened by melonedo over 1 year ago - 1 comment

#53 - [RISCV] Support for CoreV bit manipulation intrinsics

Pull Request - State: closed - Opened by melonedo over 1 year ago

#52 - [RISCV] Implement XcvElw Encoding

Pull Request - State: closed - Opened by realqhc over 1 year ago - 3 comments

#51 - [CI] Enable CI tests for clang

Pull Request - State: closed - Opened by melonedo over 1 year ago - 1 comment

#50 - [RISCV] Support CoreV SIMD builtins in clang

Pull Request - State: closed - Opened by melonedo over 1 year ago

#49 - [RISCV] Support encoding bit manipulation instructions

Pull Request - State: closed - Opened by melonedo over 1 year ago - 2 comments

#48 - [RISCV] Fix signedness of Core-V SIMD instructions

Pull Request - State: closed - Opened by melonedo over 1 year ago - 4 comments

#47 - [RISCV] Update encodings of ALU and testcases.

Pull Request - State: closed - Opened by ChunyuLiao over 1 year ago - 2 comments

#46 - [RISCV] Support CoreV SIMD intrinsics

Pull Request - State: closed - Opened by melonedo over 1 year ago

#45 - Verify CORE-V MC layer tests check disassembler

Issue - State: closed - Opened by simonpcook over 1 year ago - 2 comments

#44 - [CI] Remove unneeded .github files

Pull Request - State: closed - Opened by simonpcook over 1 year ago - 1 comment

#43 - We are using LLVM's default "do not open pull request" option

Issue - State: closed - Opened by simonpcook over 1 year ago

#42 - [COREV] Re-enable Windows testing

Pull Request - State: closed - Opened by simonpcook over 1 year ago - 2 comments

#41 - [RISCV] Match the behavior for Hardware Loop

Pull Request - State: closed - Opened by realqhc over 1 year ago - 2 comments

#40 - HWLP Behavior difference between LLVM and GCC

Issue - State: closed - Opened by realqhc over 1 year ago - 1 comment

#39 - [RISCV] Fix MAC instructions

Pull Request - State: closed - Opened by realqhc over 1 year ago

#38 - Mac instruction error

Issue - State: closed - Opened by ChunyuLiao over 1 year ago - 2 comments

#37 - [RISCV] Implement writeback and signedness for Core-V SIMD extension

Pull Request - State: closed - Opened by melonedo over 1 year ago - 3 comments

#36 - [RISCV] Add xcvsimd option

Pull Request - State: closed - Opened by melonedo over 1 year ago

#35 - [RISCV] Remove 'xcv' extension

Pull Request - State: closed - Opened by CharKeaney over 1 year ago

#34 - [RISCV] Update CORE-V Extension name prefix from 'xcorev' to 'xcv'

Pull Request - State: closed - Opened by CharKeaney over 1 year ago

#33 - [RISCV] Update MAC instructions

Pull Request - State: closed - Opened by realqhc over 1 year ago - 3 comments

#32 - [RISCV] Support CoreV SIMD builtins in Clang

Pull Request - State: closed - Opened by melonedo over 1 year ago - 10 comments

#31 - [RISCV] Replace the tags in CORE-V commits with [RISCV]

Pull Request - State: closed - Opened by CharKeaney over 1 year ago - 2 comments

#30 - Replace the tags in CORE-V commits with `[RISCV]`

Issue - State: closed - Opened by CharKeaney over 1 year ago - 10 comments

#29 - Update references to `xcorev` in CORE-V march strings with references to `xcv`

Issue - State: closed - Opened by CharKeaney almost 2 years ago - 2 comments
Labels: enhancement

#28 - Assembler implementation status compared to GCC

Issue - State: closed - Opened by melonedo almost 2 years ago - 21 comments

#27 - [RISCV] Support encoding SIMD instructions

Pull Request - State: closed - Opened by melonedo almost 2 years ago - 4 comments

#26 - [corev] update hwlp instructions

Pull Request - State: closed - Opened by realqhc almost 2 years ago - 4 comments

#25 - [COREV] Fix generation for clipu from betweenu pattern

Pull Request - State: closed - Opened by CharKeaney almost 2 years ago - 2 comments

#24 - [COREV] Fix the encoding of mem instructions

Pull Request - State: closed - Opened by ChunyuLiao almost 2 years ago - 6 comments

#23 - [COREV] Add CI workflow file corev-llvm-tests.yml.

Pull Request - State: closed - Opened by xingmingjie almost 2 years ago - 5 comments

#22 - Fix the encoding of alu instructions

Pull Request - State: closed - Opened by ChunyuLiao almost 2 years ago - 4 comments

#21 - Roll forward repository to upstream LLVM as of 25 Oct 2022.

Pull Request - State: closed - Opened by CharKeaney about 2 years ago - 4 comments

#20 - RISC-V zce extension support

Pull Request - State: closed - Opened by realqhc over 2 years ago

#19 - LLVM: plans to update the repository

Issue - State: closed - Opened by realqhc over 2 years ago - 3 comments

#18 - Add support for RISC-V Zce Extension

Pull Request - State: closed - Opened by realqhc almost 3 years ago

#17 - Add hardware loop code generation

Pull Request - State: closed - Opened by serkm over 3 years ago - 6 comments

#16 - CORE-V: expand xcorev target feature to the extensions it enables

Issue - State: closed - Opened by flip1995 over 3 years ago - 2 comments

#15 - [COREV] Add more tests for ALU and load/store instructions

Pull Request - State: closed - Opened by serkm over 3 years ago - 2 comments

#14 - [COREV] Fix fallthrough warning

Pull Request - State: closed - Opened by flip1995 over 3 years ago - 1 comment

#13 - [COREV] Define patterns for the generation of load/store instructions

Pull Request - State: closed - Opened by serkm over 3 years ago - 2 comments

#12 - [COREV] Define patterns for the generation of ALU instructions

Pull Request - State: closed - Opened by serkm over 3 years ago - 4 comments

GitHub / openhwgroup/corev-llvm-project issues and pull requests