lowrisc/ibex issues and pull requests

#29 - Replace core_id and cluster_id parameters in favour of a single hartid parameter

Issue - State: closed - Opened by asb over 5 years ago - 1 comment
Labels: Good First Issue, Component:RTL, Type:Cleanup

#28 - Code cleanup

Pull Request - State: closed - Opened by vogelpi over 5 years ago - 4 comments

#27 - Standard-compliant performance counters

Issue - State: closed - Opened by imphil over 5 years ago
Labels: Type:Enhancement, Component:RTL

#26 - Some more ibex cleanup

Pull Request - State: closed - Opened by imphil over 5 years ago - 1 comment

#25 - Remove reg-reg loads

Issue - State: closed - Opened by imphil over 5 years ago
Labels: Type:Bug, Component:RTL, Type:Spec-Compliance

#24 - Fix PDF documentation build

Issue - State: closed - Opened by imphil over 5 years ago - 3 comments

#23 - Add documentation link to the README.md

Pull Request - State: closed - Opened by imphil over 5 years ago

#22 - Cleanup includes and defines

Pull Request - State: closed - Opened by imphil over 5 years ago - 1 comment

#21 - Testbench for running simulations

Issue - State: closed - Opened by raulbehl over 5 years ago - 2 comments

#20 - Prefetcher busy_o

Issue - State: closed - Opened by darbaria over 5 years ago - 1 comment

#19 - N_EXT_PERF_COUNTERS

Issue - State: closed - Opened by darbaria over 5 years ago - 2 comments

#18 - dbg_req_i & irq_req_ctrl_i both are high

Issue - State: closed - Opened by darbaria over 5 years ago - 7 comments

#17 - Why performance counters don’t start counting right away

Issue - State: closed - Opened by Liyang131313 almost 6 years ago - 1 comment
Labels: Type:Question

#16 - Bit clear operation (`csrrc` and `csrrci` ops) wrong for performance counter registers

Issue - State: closed - Opened by brabect1 almost 6 years ago - 1 comment
Labels: Type:Bug, Component:RTL

#15 - PCMR bits swapped in documentation

Issue - State: closed - Opened by brabect1 almost 6 years ago - 1 comment
Labels: Type:Bug, Component:Doc, Component:RTL

#14 - ASIC synthesis

Issue - State: closed - Opened by Liyang131313 almost 6 years ago - 2 comments

#13 - Issues using Zero-Riscy in Vivado

Issue - State: closed - Opened by supersnackbros almost 6 years ago - 5 comments
Labels: Type:Question

#12 - Documentation improvements

Pull Request - State: closed - Opened by wallento almost 6 years ago

#11 - Doc: Inline documentation of waveforms

Pull Request - State: closed - Opened by wallento almost 6 years ago - 1 comment

#10 - Update README.md

Pull Request - State: closed - Opened by isarrider about 6 years ago

#9 - Convert documentation to restructured text

Pull Request - State: closed - Opened by wallento about 6 years ago - 1 comment

#8 - Support for PMP

Issue - State: closed - Opened by wallento about 6 years ago - 5 comments
Labels: Type:Enhancement, Component:RTL

#7 - Restart grant wait for synchronous branch changes

Pull Request - State: closed - Opened by towoe over 6 years ago - 9 comments

#6 - why mstatus accessed by CSR instruction will flush prefetch fifo

Issue - State: closed - Opened by pearson78 over 6 years ago - 1 comment
Labels: Type:Question, Component:RTL

#5 - clock_en_i no longer connected

Issue - State: closed - Opened by adich0 over 6 years ago - 1 comment

#4 - If instr[14:12]=3’b111”, rd=M[rs1+rs2]. This instruction code is not defined in the RISC-V spec.

Issue - State: closed - Opened by pearson78 over 6 years ago - 1 comment
Labels: Type:Bug, Resolution:Duplicate

#3 - ra register not update when single step debug

Issue - State: closed - Opened by timdudu almost 7 years ago - 2 comments

#2 - Support for riscv-formal

Issue - State: open - Opened by chaosbastler almost 7 years ago - 22 comments
Labels: Type:Enhancement, Component:DV

#1 - migrating to micro-riscy configuration problem

Issue - State: closed - Opened by ghost about 7 years ago - 2 comments

Ecosyste.ms: Issues

GitHub / lowrisc/ibex issues and pull requests