Ecosyste.ms: Issues
An open API service for providing issue and pull request metadata for open source projects.
GitHub / intel/rohd-cosim issues and pull requests
#37 - Fix documentation generation
Pull Request -
State: closed - Opened by mkorbel1 12 months ago
#36 - Update analysis options and doc checks for Dart 3.3.0
Pull Request -
State: closed - Opened by mkorbel1 12 months ago
#35 - Update default permissions in GH actions
Pull Request -
State: closed - Opened by mkorbel1 about 1 year ago
#34 - Support for `LogicArray` ports
Pull Request -
State: closed - Opened by mkorbel1 about 1 year ago
#33 - Cleanup and doc updates
Pull Request -
State: closed - Opened by mkorbel1 over 1 year ago
#32 - Support `LogicArray` ports
Issue -
State: closed - Opened by mkorbel1 over 1 year ago
Labels: enhancement
#31 - Check devcontainer in CI
Pull Request -
State: closed - Opened by mkorbel1 over 1 year ago
#30 - Update `CONTRIBUTING.md` with improvements from ROHD repo
Issue -
State: closed - Opened by mkorbel1 almost 2 years ago
- 1 comment
Labels: enhancement
#29 - Update `CONTRIBUTING.md` with improvements from ROHD repo
Issue -
State: closed - Opened by mkorbel1 almost 2 years ago
Labels: enhancement
#28 - Markdown checks and recommended extensions
Pull Request -
State: closed - Opened by mkorbel1 almost 2 years ago
#27 - Use a specific ubuntu version for actions instead of latest
Issue -
State: closed - Opened by mkorbel1 almost 2 years ago
- 1 comment
Labels: enhancement
#26 - Add ability to configure build and sim arguments at connection time
Issue -
State: open - Opened by mkorbel1 almost 2 years ago
Labels: enhancement
#25 - Add recommended extensions for VSCode
Issue -
State: closed - Opened by mkorbel1 almost 2 years ago
Labels: enhancement
#24 - Add check for Markdown in CI
Issue -
State: closed - Opened by mkorbel1 about 2 years ago
- 1 comment
Labels: enhancement
#23 - More robust test cleanup
Pull Request -
State: closed - Opened by mkorbel1 about 2 years ago
#22 - Add an example with a counter and wrap config
Pull Request -
State: closed - Opened by mkorbel1 about 2 years ago
#21 - Update contribution style section
Pull Request -
State: closed - Opened by mkorbel1 about 2 years ago
#20 - Fix doc check
Pull Request -
State: closed - Opened by mkorbel1 about 2 years ago
#19 - Fix typos, doc gen bug, and update documentation
Pull Request -
State: closed - Opened by mkorbel1 about 2 years ago
#18 - Actions, tools, codespace, and test cleanup
Pull Request -
State: closed - Opened by mkorbel1 about 2 years ago
#17 - Add an example to the repo
Issue -
State: closed - Opened by mkorbel1 about 2 years ago
Labels: enhancement
#16 - Add issue filing and PR templates for GitHub
Pull Request -
State: closed - Opened by mkorbel1 about 2 years ago
#15 - Resolve race condition in RohdConnector during interactive debug and SV timeout
Issue -
State: open - Opened by mkorbel1 about 2 years ago
Labels: bug
#14 - Add indication in `RohdConnector` when a failure was encountered
Issue -
State: open - Opened by mkorbel1 about 2 years ago
#13 - Add testing that SV `#` delays are properly handled
Issue -
State: open - Opened by mkorbel1 about 2 years ago
Labels: enhancement
#12 - Add more extensive testing that `throwOnUnexpectedEnd` works with `PortConfig`
Issue -
State: open - Opened by mkorbel1 about 2 years ago
Labels: enhancement
#11 - Add a `PortConfig` test where the process crashes before `Simulator.run`
Issue -
State: open - Opened by mkorbel1 about 2 years ago
Labels: enhancement, good first issue
#10 - Properly `await` the `Simulator.reset` in finish_test.dart
Issue -
State: open - Opened by mkorbel1 about 2 years ago
Labels: bug
#9 - Add testing for 0-width input and output ports
Issue -
State: open - Opened by mkorbel1 about 2 years ago
#8 - Don't send more ticks than necessary
Issue -
State: open - Opened by mkorbel1 about 2 years ago
Labels: enhancement
#7 - Add a test covering scenarios with multiple SV simulator ticks per timestamp
Issue -
State: open - Opened by mkorbel1 about 2 years ago
Labels: enhancement
#6 - Add testing for clock-divider logic with cosimulation
Issue -
State: open - Opened by mkorbel1 about 2 years ago
Labels: enhancement
#5 - Listeners linger after simulations end
Issue -
State: open - Opened by mkorbel1 about 2 years ago
Labels: bug
#4 - Add more types of arguments for `Cosim` `Module`s
Issue -
State: open - Opened by mkorbel1 about 2 years ago
Labels: enhancement
#3 - Build an annotation-based cosim-wrapper code generator
Issue -
State: open - Opened by mkorbel1 about 2 years ago
Labels: enhancement
#2 - Enable cosim access to hierarchically reference signals in SystemVerilog modules and submodules
Issue -
State: open - Opened by mkorbel1 about 2 years ago
Labels: enhancement
#1 - Use typing for cosim messages
Issue -
State: open - Opened by mkorbel1 about 2 years ago
Labels: enhancement