Ecosyste.ms: Issues

An open API service for providing issue and pull request metadata for open source projects.

GitHub / gatecat/nextpnr-xilinx issues and pull requests

#85 - XDC parsing improvements imported from nextpnr-himbaechel

Pull Request - State: open - Opened by marzoul about 1 month ago - 1 comment

#84 - Boost lib no longer has convenience.hpp

Pull Request - State: closed - Opened by marzoul about 2 months ago - 1 comment

#83 - Router2 fails to converge on XC7A100 and XC7A200

Issue - State: open - Opened by cestrauss 4 months ago - 3 comments

#82 - Is vivado indirectly required?

Issue - State: open - Opened by Kreijstal 6 months ago - 3 comments

#81 - Site_type Ingestion Confusion

Issue - State: closed - Opened by fred-freeman 9 months ago - 1 comment

#80 - pack.cc: fix wrong attribute name for negedge FFs

Pull Request - State: open - Opened by hansfbaier 10 months ago

#79 - implement MMCME2_ADV for xc7

Pull Request - State: open - Opened by hansfbaier 12 months ago

#78 - Fix warnings and dsp

Pull Request - State: open - Opened by hansfbaier about 1 year ago

#77 - Error when adding PLLE2_ADV in xc7a35

Issue - State: open - Opened by jtplaarj about 1 year ago - 3 comments

#76 - Implement CFG_CENTER primitives

Pull Request - State: open - Opened by hansfbaier about 1 year ago - 1 comment

#75 - Tristate control signals are inverted in designs routed with router1

Pull Request - State: closed - Opened by hansfbaier about 1 year ago - 3 comments

#74 - Assert/Debug fixes

Pull Request - State: closed - Opened by hansfbaier over 1 year ago - 1 comment

#73 - Placer does not terminate for example design

Issue - State: open - Opened by hansfbaier over 1 year ago - 3 comments

#72 - fasm.cc: add TDMS_33 support and fix LVDS_25

Pull Request - State: closed - Opened by hansfbaier over 1 year ago - 2 comments

#71 - fix: ODDR was not useable on tristate outputs

Pull Request - State: closed - Opened by hansfbaier over 1 year ago

#70 - One chipdb, multiple package

Issue - State: open - Opened by trabucayre over 1 year ago

#69 - working patch for latest RapidWright (2022.2.2)

Pull Request - State: open - Opened by burntfalafel over 1 year ago

#68 - Failure in generating xczu7ev.bba

Issue - State: open - Opened by burntfalafel over 1 year ago

#67 - How do I get this chipdb file: xc7a35t.bin?

Issue - State: closed - Opened by JamesTimothyMeech over 1 year ago - 2 comments

#66 - Support negedge FFs

Pull Request - State: closed - Opened by hansfbaier over 1 year ago

#65 - FDRE_1 can't be written out to fasm file

Issue - State: open - Opened by jrsa over 1 year ago - 8 comments

#64 - DSP48E1 works on Xilinx 7 series

Pull Request - State: closed - Opened by hansfbaier over 1 year ago - 6 comments

#63 - Add Spartan7 support

Pull Request - State: closed - Opened by hansfbaier almost 2 years ago

#62 - ODELAY implementation works

Pull Request - State: closed - Opened by hansfbaier almost 2 years ago - 1 comment

#61 - XC7 IDDR works!

Pull Request - State: closed - Opened by hansfbaier almost 2 years ago

#60 - Implementation of the DRIVE attribute of IO pads

Pull Request - State: closed - Opened by hansfbaier almost 2 years ago - 1 comment

#59 - XC7 ODDR implementation

Pull Request - State: closed - Opened by hansfbaier almost 2 years ago - 1 comment

#57 - Big incompatibility of the code structure with the actual NextPNR

Issue - State: closed - Opened by zipotron almost 2 years ago - 2 comments

#56 - Sync upstream

Pull Request - State: closed - Opened by mmicko almost 2 years ago - 68 comments

#55 - DDR3 is now working on the high performance banks

Pull Request - State: closed - Opened by hansfbaier almost 2 years ago - 1 comment

#54 - ERROR: Invalid global constant node 'INT_L_X0Y112/VCC_WIRE'

Issue - State: open - Opened by Demindiro almost 2 years ago

#52 - xilinx/python/xilinx_device: fix fabricname extraction

Pull Request - State: closed - Opened by trabucayre almost 2 years ago

#51 - Don't generate OUT_DIFF inside part of the IO tile, which does not exist

Pull Request - State: closed - Opened by hansfbaier almost 2 years ago

#50 - fasm.cc: Generate drive bits for SSTL io standards

Pull Request - State: closed - Opened by hansfbaier almost 2 years ago

#49 - fix not working SSTL15 input when the pin is on Y1

Pull Request - State: closed - Opened by hansfbaier almost 2 years ago

#48 - Support for the Kintex High Performance Banks (RIOB18)

Pull Request - State: closed - Opened by hansfbaier about 2 years ago

#47 - chip-db (bba or bin) files missing

Issue - State: closed - Opened by zipotron about 2 years ago - 3 comments

#45 - Merge in some of upstream nextpnr's CMakeList.txt

Pull Request - State: closed - Opened by LAK132 over 2 years ago

#44 - terminate called after throwing an instance of 'std::out_of_range'

Issue - State: open - Opened by Pocketkid2 over 2 years ago - 4 comments

#42 - Constraints issue using generated chipdb file

Issue - State: open - Opened by Pocketkid2 over 2 years ago - 1 comment

#41 - fix: patch export for xc7a35t fabric

Pull Request - State: closed - Opened by Xiretza over 2 years ago

#40 - Handle CRLF line endings in xdc files

Pull Request - State: closed - Opened by LAK132 over 2 years ago

#39 - fix: no .IN bit set for LVCMOS12/15/18

Pull Request - State: closed - Opened by hansfbaier over 2 years ago

#38 - Update bbaexport.java

Pull Request - State: open - Opened by the-centry over 2 years ago

#37 - bbaexport.jar compile failed!

Issue - State: open - Opened by the-centry over 2 years ago - 1 comment

#35 - `bbaexport.py` fails for `xc7a35t`

Issue - State: open - Opened by ajelinski over 2 years ago - 2 comments

#34 - Placer fails with long CARRY4 chains

Issue - State: open - Opened by kazkojima over 2 years ago - 4 comments

#33 - Adapt to updated prjxray filestructure

Pull Request - State: closed - Opened by unbtorsten almost 3 years ago

#32 - segmentation fault

Issue - State: closed - Opened by KiranKanchi over 3 years ago - 6 comments

#31 - Backport various recent router2 improvements

Pull Request - State: closed - Opened by gatecat over 3 years ago

#30 - xilinx: fix PLLE2 feature

Pull Request - State: closed - Opened by kowalewskijan over 3 years ago

#29 - xilinx: fix IN_USE feature

Pull Request - State: closed - Opened by kowalewskijan over 3 years ago

#28 - ERROR: Unable to place cell ..., no Bels remaining of type 'LDCE'

Issue - State: open - Opened by ildus almost 4 years ago - 2 comments

#27 - ERROR: Unable to place cell: no Bels remaining of type 'MMCME2_ADV_MMCME2_ADV'

Issue - State: open - Opened by MJoergen almost 4 years ago - 2 comments

#26 - Handle -dict, more complicated -waveform and ignore -add

Pull Request - State: closed - Opened by LAK132 about 4 years ago

#25 - bbasm missing endian argument in documentation

Issue - State: open - Opened by LAK132 about 4 years ago - 1 comment

#24 - Instantiation of Xilinx PS hard IP

Issue - State: open - Opened by ilesser about 4 years ago - 5 comments

#23 - Bump prjxray-db

Pull Request - State: closed - Opened by acomodi about 4 years ago - 1 comment

#22 - ERROR: IDELAYE2 'IDELAYE2' has disconnected IDATAIN input

Issue - State: closed - Opened by fallen about 4 years ago - 14 comments

#21 - Incorrect FASM lines related to SERDES

Issue - State: closed - Opened by acomodi over 4 years ago - 6 comments

#20 - Added ultra96 board example

Pull Request - State: open - Opened by ilesser over 4 years ago - 4 comments

#19 - Is Vivavo 2017.2 required?

Issue - State: closed - Opened by ilesser over 4 years ago - 2 comments

#18 - Add SSTL15 Bits

Pull Request - State: closed - Opened by Haini over 4 years ago - 1 comment

#17 - X-Ray Database incompatible to nextpnr-xilinx FASM

Issue - State: closed - Opened by Haini over 4 years ago - 3 comments

#16 - Xilinx IO fixes

Pull Request - State: closed - Opened by daveshah1 over 4 years ago

#15 - xilinx: Enable use of all PLLs

Pull Request - State: closed - Opened by daveshah1 over 4 years ago

#14 - rapidwright: Import approximate routing delays

Pull Request - State: closed - Opened by daveshah1 over 4 years ago

#13 - added digilent genesys2 (kintex7) example

Pull Request - State: open - Opened by asanaullah almost 5 years ago - 1 comment

#12 - terminate called after throwing an instance of 'std::length_error'

Issue - State: closed - Opened by fallen almost 5 years ago - 3 comments

#11 - Exception when --chipdb argument is not supplied

Issue - State: closed - Opened by Xiretza almost 5 years ago - 2 comments

#10 - xilinx: Preliminary DSP48E1 support

Pull Request - State: closed - Opened by daveshah1 almost 5 years ago

#9 - Adding Zynq7 (Arty Z7-20) with Xray support

Pull Request - State: closed - Opened by daveshah1 almost 5 years ago

#8 - Import timing data from prjxray for routing and core cells

Pull Request - State: closed - Opened by daveshah1 almost 5 years ago

#7 - xilinx: Apply top SING hack to pseudo pip triggered IO bits

Pull Request - State: closed - Opened by daveshah1 almost 5 years ago

#6 - Unable to compile Artix-7 example

Issue - State: closed - Opened by Xiretza almost 5 years ago

#5 - Update documentation and Arty example

Pull Request - State: closed - Opened by Xiretza almost 5 years ago

#4 - SIGBUS when running nextpnr-xilinx

Issue - State: closed - Opened by fallen almost 5 years ago - 4 comments

#3 - Support for building 7-series database using prjxray-db

Pull Request - State: closed - Opened by daveshah1 about 5 years ago

#2 - Add DSP48E2s, URAM288 and RAM128X1D support for UltraScale+

Pull Request - State: closed - Opened by daveshah1 about 5 years ago

#1 - Add support for MUXF[789]

Pull Request - State: closed - Opened by daveshah1 about 5 years ago