fleroviux/lunatic issues and pull requests

#50 - X64: multiple codegen optimizations

Pull Request - State: closed - Opened by fleroviux 12 months ago

#49 - Possible IR and x86_64 codegen optimizations

Issue - State: open - Opened by fleroviux 12 months ago

#48 - Make a clearer separation to allow multiple backends

Pull Request - State: closed - Opened by marysaka over 1 year ago - 1 comment

#47 - Rewrite memory allocator

Pull Request - State: closed - Opened by marysaka over 1 year ago

#46 - Add codepath when BMI isn't supported

Pull Request - State: closed - Opened by marysaka over 1 year ago

#45 - fix warnings on macOS

Pull Request - State: closed - Opened by marysaka over 1 year ago - 1 comment

#44 - Multiple optimizations

Pull Request - State: closed - Opened by fleroviux about 2 years ago

#43 - X64Backend: prioritize callee-saved registers during allocation

Issue - State: open - Opened by fleroviux over 2 years ago
Labels: backend: x64, codegen

#42 - WIP: Implement ARMv6K emulation

Pull Request - State: open - Opened by fleroviux over 2 years ago

#41 - Remove designated initialisers and require only C++17

Pull Request - State: closed - Opened by fleroviux over 2 years ago

#40 - Cast enum value to its underlying type for {fmt}

Pull Request - State: closed - Opened by StrikerX3 over 2 years ago

#39 - Integrate with VTune JIT Profiling API

Pull Request - State: closed - Opened by StrikerX3 over 2 years ago - 1 comment

#38 - backend: Perform conditional jump based on eflags

Pull Request - State: closed - Opened by merryhime over 2 years ago - 1 comment

#37 - Use the Intel VTune JIT Profiling API

Issue - State: closed - Opened by StrikerX3 almost 3 years ago - 1 comment

#36 - Honor exception_base when resetting JIT state

Pull Request - State: closed - Opened by StrikerX3 almost 3 years ago - 1 comment

#35 - Backend\X64: remove redundant push/pop ops from MRC and MCR.

Pull Request - State: closed - Opened by fleroviux almost 3 years ago

#34 - Backend\X64: remove redundant push/pop ops from LDR and STR

Pull Request - State: closed - Opened by fleroviux almost 3 years ago

#33 - Test: remove the reference ARM interpreter

Pull Request - State: closed - Opened by fleroviux almost 3 years ago

#32 - Backend\X64: reuse input registers for output if possible

Pull Request - State: closed - Opened by fleroviux almost 3 years ago

#31 - Frontend\IR: update dead flag elision to be more accurate.

Pull Request - State: closed - Opened by fleroviux almost 3 years ago

#30 - Frontend\IR: add a preliminary dead flag elision pass

Pull Request - State: closed - Opened by fleroviux almost 3 years ago

#29 - Setup a very basic optimisation framework and add basic dead code elision.

Pull Request - State: closed - Opened by fleroviux almost 3 years ago

#28 - Frontend\IR: repoint variables instead of moving when possible.

Pull Request - State: closed - Opened by fleroviux about 3 years ago

#27 - More branch optimisations

Pull Request - State: closed - Opened by fleroviux about 3 years ago

#26 - Naïve cycle counting

Pull Request - State: closed - Opened by StrikerX3 about 3 years ago - 1 comment

#25 - Allow IRQ wait to be cancelled

Pull Request - State: closed - Opened by StrikerX3 about 3 years ago - 1 comment

#24 - Implement Windows-specific aligned_alloc

Pull Request - State: closed - Opened by StrikerX3 about 3 years ago - 1 comment

#23 - Frontend: begin inlining branches in some trivial cases.

Pull Request - State: closed - Opened by fleroviux about 3 years ago

#22 - Backend-x64: Fix codegen for TCM field dereferences

Pull Request - State: closed - Opened by StrikerX3 about 3 years ago - 3 comments

#21 - Add option to use externally provided {fmt} library and fix a few warnings

Pull Request - State: closed - Opened by StrikerX3 about 3 years ago - 1 comment