Ecosyste.ms: Issues
An open API service for providing issue and pull request metadata for open source projects.
GitHub / aws/aws-fpga issues and pull requests
#680 - Release v2.0.3
Pull Request -
State: closed - Opened by TrahStevAmz 5 days ago
#680 - Release v2.0.3
Pull Request -
State: closed - Opened by TrahStevAmz 5 days ago
#679 - Unable to access the instance from India
Issue -
State: open - Opened by npurusho 16 days ago
- 1 comment
#678 - Access to modules over PCIS on small-shell
Issue -
State: closed - Opened by furkanturan 16 days ago
- 2 comments
#677 - Could NOT find Vitis (missing: Vitis_AIE_INCLUDE_DIR)
Issue -
State: open - Opened by coExpo 17 days ago
- 3 comments
#676 - create_vitis_afi.sh not in repo
Issue -
State: closed - Opened by ifransazov 18 days ago
- 2 comments
#675 - Directory structure issue when generating .xclbin from .xo on F2
Issue -
State: closed - Opened by ifransazov 18 days ago
- 5 comments
#674 - Branch deprecation
Pull Request -
State: closed - Opened by czfpga 23 days ago
#673 - AFI Creation with Vivado 2024
Issue -
State: closed - Opened by itaibak 26 days ago
- 6 comments
#672 - Release v2.0.2
Pull Request -
State: closed - Opened by mjthimm 27 days ago
#671 - F2 XDMA shell availability
Issue -
State: open - Opened by itaibak 27 days ago
- 1 comment
#670 - Update 2024.1/f1 xdma shell
Pull Request -
State: closed - Opened by czfpga about 1 month ago
- 1 comment
#669 - Update 2024.1/f1 small shell
Pull Request -
State: closed - Opened by czfpga about 1 month ago
#668 - F1 small shell 2024.1 update
Pull Request -
State: closed - Opened by czfpga about 1 month ago
#667 - F1 xdma shell 2024.1 update
Pull Request -
State: closed - Opened by czfpga about 1 month ago
#665 - Release v2.0.1
Pull Request -
State: closed - Opened by mjthimm about 1 month ago
#664 - Release v2.0.1
Pull Request -
State: closed - Opened by mjthimm about 1 month ago
#663 - Release v2.0.1
Pull Request -
State: closed - Opened by mjthimm about 1 month ago
#662 - F2 rtd
Pull Request -
State: closed - Opened by mjthimm about 1 month ago
#662 - F2 rtd
Pull Request -
State: closed - Opened by mjthimm about 1 month ago
#661 - Request for elaboration in the F2 C++ flow readme file
Issue -
State: closed - Opened by yk-choi-yk about 1 month ago
- 4 comments
#661 - Request for elaboration in the F2 C++ flow readme file
Issue -
State: closed - Opened by yk-choi-yk about 1 month ago
- 4 comments
#660 - rtd test
Pull Request -
State: closed - Opened by mjthimm about 2 months ago
#659 - rtd test
Pull Request -
State: closed - Opened by mjthimm about 2 months ago
#658 - Inquiry About FPGA Developer AMI Support and Future Updates
Issue -
State: open - Opened by JinB1 about 2 months ago
- 15 comments
#657 - Compatibility of U200-Designed xclbin / create_vitis_afi.sh with AWS F1 Instance and XRT API Usage
Issue -
State: open - Opened by JinB1 about 2 months ago
- 2 comments
#656 - When running with F1.16xlarge on all FPGAs, PCIE access to one of them is stuck
Issue -
State: open - Opened by NoamDualBird 2 months ago
- 14 comments
#655 - Encounter error when using dcp to create AFI image
Issue -
State: closed - Opened by zackyen53614 3 months ago
- 2 comments
#654 - 用dcp去create AFI image遇到error
Issue -
State: closed - Opened by zackyen53614 3 months ago
#653 - Support for newer version of Vivado...
Issue -
State: open - Opened by wpiman 4 months ago
- 2 comments
#652 - How to issue a PCIe FLR to CL
Issue -
State: open - Opened by ns-intusurg 4 months ago
- 11 comments
#651 - HLX flow FIFO IP generator version conflict
Issue -
State: closed - Opened by cholan2100 4 months ago
- 2 comments
#650 - Loading of simulation waveform in Vivado is too slow
Issue -
State: open - Opened by Gogul-N 6 months ago
- 2 comments
#649 - Simulation - File Dump to a memory
Issue -
State: closed - Opened by Gogul-N 6 months ago
- 1 comment
#648 - ETA on new dev AMI?
Issue -
State: closed - Opened by ljp0101 6 months ago
- 2 comments
#647 - fail in get_f1_ami_id()
Issue -
State: open - Opened by huchensong 6 months ago
- 3 comments
#646 - Does AWS F1 support Vitis AI 2.5?
Issue -
State: open - Opened by zain2323 6 months ago
#645 - phys_opt_design error during implementation
Issue -
State: closed - Opened by Gogul-N 7 months ago
- 3 comments
#644 - Connect MicroBlaze Debug Module (MDM) to Virtual JTAG in Vivado IP Integrator
Issue -
State: open - Opened by s03311251 8 months ago
- 4 comments
#643 - FPGA cloud-based
Issue -
State: open - Opened by raghady2001 9 months ago
- 1 comment
#642 - Instance status checks failures
Issue -
State: open - Opened by ljp0101 9 months ago
- 14 comments
#641 - Debug embedded microblaze using XVC JTAG in AWS FPGA shell
Issue -
State: open - Opened by augierg 9 months ago
- 12 comments
#640 - Accessing the AXI-Lite via the fpga_pci_attach call...
Issue -
State: open - Opened by wpiman 9 months ago
- 2 comments
#638 - DRAM page mode
Issue -
State: open - Opened by ehudeliaz 11 months ago
- 1 comment
#637 - Files missing from AMI
Issue -
State: open - Opened by jerhill 11 months ago
- 2 comments
#636 - Does aws have u200?
Issue -
State: closed - Opened by deepakkumar2440 12 months ago
- 3 comments
#635 - Linux Kernel 6 support for xdma
Issue -
State: closed - Opened by Fischiii 12 months ago
- 4 comments
#634 - fpga_mgmt_load_local_image_sync() failures
Issue -
State: closed - Opened by ljp0101 about 1 year ago
- 12 comments
#633 - peer xclbin download err: -11
Issue -
State: open - Opened by ioeddk about 1 year ago
- 2 comments
#632 - PCIM ARID all bits can be used?
Issue -
State: open - Opened by tewujianke about 1 year ago
- 1 comment
#631 - Name port does not exist for instance f1_inst
Issue -
State: closed - Opened by kevinkiener about 1 year ago
- 6 comments
#630 - Update
Issue -
State: open - Opened by Hotwright about 1 year ago
- 13 comments
#629 - Inserting ILA is improving the performance
Issue -
State: closed - Opened by Gogul-N about 1 year ago
- 4 comments
#628 - [XRT] ERROR: failed to load xclbin: Invalid argument / xocl_read_axlf_helper: interface uuids do not match
Issue -
State: closed - Opened by BogdanSorlea about 1 year ago
- 4 comments
#627 - DMA read is not correct
Issue -
State: closed - Opened by Gogul-N over 1 year ago
- 1 comment
#626 - Clock routing error [Place 30-838]
Issue -
State: closed - Opened by ljp0101 over 1 year ago
- 4 comments
#625 - Time delay in filling up BRAM using DMA
Issue -
State: closed - Opened by Gogul-N over 1 year ago
- 3 comments
#624 - PCIM AXI W Channel hangs with wReady stuck at 0
Issue -
State: closed - Opened by tewujianke over 1 year ago
- 2 comments
#623 - DDR performance drop with specific address access pattern
Issue -
State: closed - Opened by indragade over 1 year ago
- 4 comments
#622 - Using ARM processor in f1 FPGA instance
Issue -
State: closed - Opened by Gogul-N over 1 year ago
- 16 comments
#621 - Placement issues faced as Vivado Tool is not using complete pBlock for Custom Logic Design
Issue -
State: closed - Opened by Gogul-N over 1 year ago
- 5 comments
#620 - ERROR: [Place 30-678] Failed to do clock region partitioning
Issue -
State: closed - Opened by Gogul-N over 1 year ago
- 8 comments
#619 - AWS XVC new update
Issue -
State: closed - Opened by jimmy-adams over 1 year ago
- 4 comments
#618 - vitis_setup.sh with non-root permissions
Issue -
State: open - Opened by linux-guy-217 over 1 year ago
- 5 comments
#617 - Reading Interrupt Signal from the shell
Issue -
State: closed - Opened by Gogul-N over 1 year ago
- 2 comments
#616 - Partial configuration error on SH_DEBUG_BRIDGE
Issue -
State: open - Opened by ehudeliaz over 1 year ago
- 14 comments
#615 - Cannot simulate with the branch small_shell
Issue -
State: closed - Opened by vsoBen over 1 year ago
- 2 comments
#614 - [Question]: Xilinx library elaboration error with VCS simulation
Issue -
State: closed - Opened by sajjadahmed677 over 1 year ago
- 2 comments
#613 - [Question]: Is it possible to instantiate my own DDR IP or I must use SH_DDR?
Issue -
State: closed - Opened by ehudeliaz over 1 year ago
- 2 comments
#612 - FAQ update on scrubbing scenario
Pull Request -
State: closed - Opened by kyyalama2 over 1 year ago
#611 - fpga_dma_open_queue() failure
Issue -
State: closed - Opened by ljp0101 over 1 year ago
- 3 comments
#610 - [Question]: Post-Route DRC in SHELL clock nets.
Issue -
State: closed - Opened by sajjadahmed677 over 1 year ago
- 10 comments
#609 - Can an AFI support on the fly partial reconfiguration through providing AWS multiple DCPs or a partially reconfigurable DCP?
Issue -
State: closed - Opened by hgrove over 1 year ago
- 4 comments
#608 - Question: Availability zones and instance availability factor
Issue -
State: closed - Opened by ljp0101 over 1 year ago
- 2 comments
#607 - Difficulty creating fpga image using HDK getting started guide (INACCESSIBLE_INPUT: Error accessing resource in S3)
Issue -
State: closed - Opened by hubregtsen over 1 year ago
- 2 comments
#606 - XDMA no longer builds in Ubuntu AMI
Issue -
State: closed - Opened by rsnikhil almost 2 years ago
- 10 comments
#605 - [Question]: Multi beat burst transactions between two FPGAs
Issue -
State: closed - Opened by sajjadahmed677 almost 2 years ago
- 3 comments
#604 - [Question]: Hold violations in PCIS interface
Issue -
State: closed - Opened by sajjadahmed677 almost 2 years ago
- 5 comments
#603 - AHB Slave interface issue in Vivado IP (AWS f1 Instance)
Issue -
State: open - Opened by Gogul-N almost 2 years ago
- 2 comments
#602 - AWS XVC question
Issue -
State: closed - Opened by jimmy-adams almost 2 years ago
- 2 comments
#601 - Change DEVICE to PLATFORM
Pull Request -
State: open - Opened by hgminh95 almost 2 years ago
#600 - Will there be future support for 2022.x (and 2021.2) tool versions in AL2 AMIs?
Issue -
State: open - Opened by abejgonzalez almost 2 years ago
- 3 comments
#599 - update README (#735)
Pull Request -
State: closed - Opened by kyyalama2 almost 2 years ago
#598 - test
Pull Request -
State: closed - Opened by oops408 almost 2 years ago
#597 - Hi,
Issue -
State: closed - Opened by Gogul-N almost 2 years ago
- 2 comments
#596 - PCIS interface AXI ID
Issue -
State: closed - Opened by abhaywindsor almost 2 years ago
- 2 comments
#595 - Changing A1 frequency
Issue -
State: closed - Opened by abhaywindsor about 2 years ago
- 3 comments
#594 - How were the IPs in hdk/common/shell_v04261818/design created without any project
Issue -
State: closed - Opened by za1nrkhan about 2 years ago
- 3 comments
#593 - cl_hello_world_ref_hx fails to synthesis
Issue -
State: closed - Opened by johnrabo about 2 years ago
- 7 comments
#592 - MSI-X interrupts from CL are not supported when using SHELL without XDMA?
Issue -
State: closed - Opened by ehudeliaz about 2 years ago
- 3 comments
#591 - Update dpi_xsim.tcl for cl_hello_world_ref_hlx example
Pull Request -
State: open - Opened by johnrabo about 2 years ago
#590 - Unable to simulate hello world HLx in vivado
Issue -
State: closed - Opened by johnrabo about 2 years ago
- 3 comments
#589 - Bug in PCIM interface model?
Issue -
State: open - Opened by nmoroze about 2 years ago
- 3 comments
#588 - fix: secondary process crash
Pull Request -
State: open - Opened by pengjianzhang about 2 years ago
- 3 comments
#587 - Add all potentially necessary sources for elaborating sh_ddr module
Pull Request -
State: closed - Opened by ChrisKjellqvist about 2 years ago
#586 - Building DCP fails when using sh_ddr
Issue -
State: closed - Opened by ChrisKjellqvist about 2 years ago
- 4 comments
#585 - xilinx_aws-vu9p-f1_shell-v04261818_201920_3.xsa file is missing
Issue -
State: closed - Opened by Temerson0 over 2 years ago
- 2 comments
#584 - EC2 F1: AWS FPGA DRAM DMA Example fails during execution
Issue -
State: closed - Opened by jasmisbvb over 2 years ago
- 7 comments
#583 - ERROR: [BD 5-336] This command cannot be run, as the BD-design is locked.
Issue -
State: closed - Opened by svpolonsky over 2 years ago
- 6 comments