Ecosyste.ms: Issues

An open API service for providing issue and pull request metadata for open source projects.

GitHub / analogdevicesinc/hdl issues and pull requests

#100 - Adrv9379 zcu102

Pull Request - State: closed - Opened by acostina over 6 years ago

#99 - adi_ip.tcl: reorder synthesis files in the file group

Pull Request - State: closed - Opened by ronagyl over 6 years ago - 5 comments

#98 - jesd204: Add RX error statistics

Pull Request - State: closed - Opened by acostina over 6 years ago - 4 comments

#97 - Add support for JESD204 lane polarity inversion

Pull Request - State: closed - Opened by lclausen-adi over 6 years ago
Labels: enhancement

#96 - Add generic JESD204 ADC and DAC transport layer peripherals

Pull Request - State: closed - Opened by lclausen-adi over 6 years ago - 5 comments
Labels: enhancement

#95 - Dmac Intel fixes

Pull Request - State: closed - Opened by ronagyl over 6 years ago

#94 - DAC data underflow fix

Pull Request - State: closed - Opened by Csomi over 6 years ago
Labels: bug

#93 - Cleanup

Pull Request - State: closed - Opened by Csomi over 6 years ago
Labels: cosmetics

#92 - Fix a few simple warnings generated by Quartus

Pull Request - State: closed - Opened by lclausen-adi over 6 years ago

#91 - axi_dmac: AXI3 support on Intel qsys

Pull Request - State: closed - Opened by ronagyl over 6 years ago

#90 - DDS improvements

Pull Request - State: closed - Opened by Csomi over 6 years ago - 3 comments
Labels: enhancement

#89 - DAQ2 port for the iWave's A10SoC board

Pull Request - State: closed - Opened by Csomi over 6 years ago
Labels: newcarrier

#88 - AD5758 HDL design

Pull Request - State: closed - Opened by Csomi over 6 years ago - 2 comments
Labels: newboard

#87 - dmac tb changes for modelsim support

Pull Request - State: closed - Opened by ronagyl over 6 years ago

#86 - AD40xx HDL design

Pull Request - State: closed - Opened by Csomi over 6 years ago - 1 comment
Labels: newboard

#85 - ADuM7701 HDL design

Pull Request - State: closed - Opened by Csomi over 6 years ago - 1 comment
Labels: newboard

#84 - dmac: Trivial cleanups

Pull Request - State: closed - Opened by lclausen-adi over 6 years ago - 1 comment

#83 - library: Remove empty constraint files

Pull Request - State: closed - Opened by lclausen-adi over 6 years ago - 2 comments

#82 - Add quiet mode to the Makefile system

Pull Request - State: closed - Opened by lclausen-adi over 6 years ago - 2 comments

#81 - Multi-link Tx JESD204

Pull Request - State: closed - Opened by Csomi over 6 years ago - 6 comments
Labels: enhancement

#80 - Move Altera IP core dependency tracking to library Makefiles

Pull Request - State: closed - Opened by lclausen-adi over 6 years ago

#79 - jesd204:tb: Fix the loopback_tb test bench

Pull Request - State: closed - Opened by Csomi over 6 years ago
Labels: bug

#78 - Multi-link Rx JESD204

Pull Request - State: closed - Opened by Csomi over 6 years ago - 4 comments
Labels: enhancement

#77 - JESD204 fix filenames

Pull Request - State: closed - Opened by Csomi over 6 years ago - 2 comments
Labels: cosmetics

#76 - library: Remove unreferenced files from IP file lists

Pull Request - State: closed - Opened by lclausen-adi over 6 years ago

#73 - Add common project Makefiles

Pull Request - State: closed - Opened by lclausen-adi over 6 years ago - 16 comments

#72 - Dev

Pull Request - State: closed - Opened by gbvin over 6 years ago - 1 comment

#71 - adrv9371: Move lane remapping after the transceivers

Pull Request - State: closed - Opened by Csomi over 6 years ago - 1 comment
Labels: enhancement

#70 - util_axis_fifo: instantiate block ram in async mode

Pull Request - State: closed - Opened by ronagyl over 6 years ago - 3 comments

#69 - Upgrade code base to the latest tool and general clean up

Pull Request - State: closed - Opened by Csomi over 6 years ago

#68 - axi_logic_analyzer: Fix push-pull/open-drain selection

Pull Request - State: closed - Opened by aapoetzsch over 6 years ago

#67 - Dev

Pull Request - State: closed - Opened by damofei over 6 years ago - 1 comment

#66 - Make: Use $(MAKE) for recursive make commands

Pull Request - State: closed - Opened by Csomi over 6 years ago
Labels: enhancement

#64 - Use $(MAKE) not 'make'

Issue - State: closed - Opened by mateoconlechuga over 6 years ago - 3 comments

#63 - axi_logic_analyzer: Fix push-pull/open-drain selection

Pull Request - State: closed - Opened by Pushpa-11 over 6 years ago - 1 comment

#62 - A generic README update

Pull Request - State: closed - Opened by Csomi over 6 years ago - 4 comments
Labels: enhancement

#61 - sidekiqz2: Initial commit

Pull Request - State: closed - Opened by acostina over 6 years ago - 5 comments

#60 - DAQ2 porting to an iwave a10soc board

Pull Request - State: closed - Opened by Csomi over 6 years ago - 2 comments
Labels: newboard

#59 - Remove unused parameters

Pull Request - State: closed - Opened by lclausen-adi over 6 years ago - 3 comments

#58 - Dev dds improve

Pull Request - State: closed - Opened by AndreiGrozav over 6 years ago - 3 comments

#57 - Remove wire that is a redeclaration of a port

Pull Request - State: closed - Opened by lclausen-adi over 6 years ago

#56 - AXI-DMAC burst length verification

Pull Request - State: closed - Opened by lclausen-adi over 6 years ago - 6 comments

#55 - Fix OUT_CLK_SEL configuration for fmcjesdadc1 and ad6676

Pull Request - State: closed - Opened by lclausen-adi over 6 years ago - 3 comments

#54 - Fix kcu105 adrv9371x

Pull Request - State: closed - Opened by AndreiGrozav over 6 years ago

#53 - axi_logic_analyzer: Fix push-pull/open-drain selection

Pull Request - State: closed - Opened by acostina over 6 years ago

#52 - fmcomms5: Remove wire that are redeclarations of ports

Pull Request - State: closed - Opened by lclausen-adi over 6 years ago

#51 - Add limited TLAST support for streaming AXI source interface

Pull Request - State: closed - Opened by lclausen-adi over 6 years ago - 1 comment

#50 - ADuM7701/AD7405 reference design

Pull Request - State: closed - Opened by Csomi over 6 years ago - 1 comment
Labels: newboard

#49 - Update ADRV936x projects to use upack2

Pull Request - State: closed - Opened by mfornero over 6 years ago - 3 comments

#48 - axi_dmac: Include TLAST in AXIS slave port

Pull Request - State: closed - Opened by mfornero almost 7 years ago - 2 comments

#47 - Dev

Pull Request - State: closed - Opened by khue0 almost 7 years ago - 1 comment

#46 - axi_streaming_dma_rx_fifo: fix period_count clock and TLAST

Pull Request - State: closed - Opened by lucaceresoli almost 7 years ago - 1 comment

#45 - fmcadc5: Update to the ADI JESD interface

Pull Request - State: closed - Opened by acostina almost 7 years ago

#44 - Development of HDL design for ad400xfmcz

Pull Request - State: closed - Opened by Csomi almost 7 years ago - 6 comments
Labels: newboard

#43 - HDL design for AD9694 with A10SOC

Pull Request - State: closed - Opened by Csomi almost 7 years ago - 2 comments

#42 - Fix ultrascale xcvr

Pull Request - State: closed - Opened by lclausen-adi almost 7 years ago - 1 comment

#41 - Hotfix arradio c5soc

Pull Request - State: closed - Opened by Csomi almost 7 years ago - 1 comment
Labels: invalid

#40 - daq2/zcu102: Pin Swap for ZCU102 Rev1.0

Pull Request - State: closed - Opened by mhennerich almost 7 years ago - 1 comment

#39 - adi_env: Normalize environment variables

Pull Request - State: closed - Opened by mfornero almost 7 years ago - 1 comment

#37 - add cfi_flash to qsys. set nios reset vector to cfi_flash

Pull Request - State: closed - Opened by skravats about 7 years ago - 10 comments

#36 - assign ZCU102 SPI chip selects individually. Otherwise, Vivado 2016.4…

Pull Request - State: closed - Opened by njpillitteri about 7 years ago - 2 comments

#35 - Hdl 2015 r2

Pull Request - State: closed - Opened by dgummo over 7 years ago

#34 - Hdl 2016 r1

Pull Request - State: closed - Opened by zccrazywinds over 7 years ago - 1 comment

#33 - util_clkdiv: Register output port as a clock

Pull Request - State: closed - Opened by mfornero over 7 years ago - 5 comments

#32 - Hdl 2016 r2

Pull Request - State: closed - Opened by marioThabet over 7 years ago

#31 - Hdl 2015 r2

Pull Request - State: closed - Opened by mablmagong over 7 years ago - 1 comment

#30 - Hdl 2016 r2

Pull Request - State: closed - Opened by ksreo1004 over 7 years ago - 1 comment

#29 - Hdl 2016 r2

Pull Request - State: closed - Opened by ee15m012 over 7 years ago - 1 comment

#28 - Hdl 2016 r2

Pull Request - State: closed - Opened by joekuo over 7 years ago - 1 comment

#27 - remove fmcomms1 from Makefile

Pull Request - State: closed - Opened by njpillitteri over 7 years ago - 2 comments

#26 - Dev

Pull Request - State: closed - Opened by njpillitteri over 7 years ago - 5 comments

#25 - fmcomms5 on zcu102

Pull Request - State: closed - Opened by njpillitteri almost 8 years ago

#24 - Dev

Pull Request - State: closed - Opened by anujgadiyar almost 8 years ago - 1 comment

#23 - fmcomms1: Fixed ethernet connectivity

Pull Request - State: closed - Opened by sfarrokhnia almost 8 years ago - 1 comment

#22 - Dev

Pull Request - State: closed - Opened by dianafl2 almost 8 years ago - 1 comment

#21 - axi_dmac: Don't add CDC constraints when all clocks are synchronous

Pull Request - State: closed - Opened by shuwentao almost 8 years ago

#20 - WIP: util_cpack: add optional sync input

Pull Request - State: closed - Opened by mfornero about 8 years ago - 2 comments

#19 - up_axi: Same cycle BVALID/READY fails on Altera

Pull Request - State: closed - Opened by mfornero about 8 years ago - 4 comments

#18 - Hdl 2016 r1 niistt

Pull Request - State: closed - Opened by yakovenkov over 8 years ago - 6 comments

#17 - Hdl 2016 r1

Pull Request - State: closed - Opened by brostvincent over 8 years ago - 1 comment

#16 - Hdl 2014 r1

Pull Request - State: closed - Opened by engineerish over 8 years ago - 1 comment

#15 - Dev

Pull Request - State: closed - Opened by hasibmannil over 8 years ago - 1 comment

#14 - the FMCOMMS2 RX DMAC uses the same clock on all AXIS interfaces, so t…

Pull Request - State: closed - Opened by njpillitteri over 8 years ago - 2 comments

#13 - regenerate block diagram layout after running system_bd.tcl to better…

Pull Request - State: closed - Opened by njpillitteri almost 9 years ago - 2 comments

#12 - Updated scripts to allow automatic building of IPs.

Pull Request - State: closed - Opened by danielkho almost 9 years ago - 1 comment

#11 - build-design: automatically builds all IPs in Vivado

Pull Request - State: closed - Opened by danielkho almost 9 years ago - 6 comments

#10 - fix fmcjesdadc1_bd ILA warning

Pull Request - State: closed - Opened by njpillitteri almost 9 years ago - 1 comment

#9 - fmcomms1: Fixed ethernet connectivity

Pull Request - State: closed - Opened by Sangil-Lee about 9 years ago

#8 - added a toplevel Makefile

Pull Request - State: closed - Opened by jameyhicks over 9 years ago - 1 comment

#7 - Hdl 2014 r1

Pull Request - State: closed - Opened by rbardoux over 9 years ago - 1 comment

#6 - Hdl 2014 r1

Pull Request - State: closed - Opened by dlmlcr over 9 years ago - 1 comment

#5 - Hdl 2014 r1

Pull Request - State: closed - Opened by rzimmer60 almost 10 years ago

#4 - Dev

Pull Request - State: closed - Opened by peterscotty almost 10 years ago

#3 - Forum for feedback on hdl repo, bug reports?

Issue - State: closed - Opened by msteveb over 10 years ago - 1 comment

#2 - FMCOMMS1: fixed unassigned/missing clk ports for sys_ad9643_util_wfifo

Pull Request - State: closed - Opened by Reisswolf over 10 years ago - 1 comment

#1 - Library generation

Issue - State: closed - Opened by gregsmart over 10 years ago