Ecosyste.ms: Issues

An open API service for providing issue and pull request metadata for open source projects.

GitHub / VLSIDA/OpenRAM issues and pull requests

#258 - add documentation

Pull Request - State: closed - Opened by FriedrichWu 3 months ago

#257 - Issue 256: Whitespace fix

Pull Request - State: open - Opened by TristanRobitaille 3 months ago

#256 - Missing whitespace between : and " on some attributes

Issue - State: closed - Opened by TristanRobitaille 3 months ago - 4 comments

#255 - Fails to compile with sky130-pdk

Issue - State: closed - Opened by ahmedshakill 4 months ago - 1 comment

#252 - Error Occurred in Delay Generation

Issue - State: closed - Opened by YWJ226 6 months ago

#250 - Question: Available routing layers

Issue - State: closed - Opened by FriedrichWu 6 months ago - 1 comment

#249 - Modiftying Openram

Issue - State: closed - Opened by Redroom20 6 months ago - 2 comments

#248 - Generating SRAM gets stuck in extraction process of magic

Issue - State: open - Opened by FriedrichWu 6 months ago - 3 comments

#247 - Error in using sram macro(tiny) in openlane2

Issue - State: open - Opened by FriedrichWu 7 months ago - 3 comments

#246 - Adding and Removing Modules and Customizing Module Ports

Issue - State: closed - Opened by YWJ226 7 months ago - 3 comments

#245 - Runtime

Issue - State: open - Opened by mbautista-lab 7 months ago - 8 comments

#244 - Not generate certain module

Issue - State: closed - Opened by YWJ226 8 months ago - 1 comment

#242 - Power estimation seems too high

Issue - State: open - Opened by Lukemagik 8 months ago - 14 comments

#241 - Support for ASAP7 PDK

Issue - State: closed - Opened by mbautista-lab 9 months ago - 1 comment

#238 - Import custom file

Issue - State: closed - Opened by YWJ226 9 months ago - 3 comments

#237 - No liberty file is created for ROMs

Issue - State: closed - Opened by galv 10 months ago - 2 comments

#236 - Routing error due to high (vertical) density?

Issue - State: open - Opened by c-93 10 months ago - 1 comment
Labels: enhancement, help wanted

#235 - Importing a custom GDS file.

Issue - State: closed - Opened by YWJ226 10 months ago - 7 comments

#233 - multiports bitcell

Issue - State: closed - Opened by YWJ226 10 months ago - 1 comment

#232 - ROM >= 8k fails to build

Issue - State: open - Opened by urish 10 months ago - 3 comments

#231 - ROM dump + replace contents

Issue - State: open - Opened by urish 10 months ago

#230 - Ensure rom_data dir exists

Pull Request - State: closed - Opened by urish 10 months ago - 3 comments

#229 - Support for PROBE PDK

Issue - State: open - Opened by glzhou97 11 months ago - 4 comments

#228 - Error in SRAM creation with banks

Issue - State: open - Opened by KanishR1 12 months ago - 7 comments

#227 - openram.py doesn't exist in any tree

Issue - State: open - Opened by msarwarx1 12 months ago - 1 comment

#226 - Unable to read configuration file

Issue - State: closed - Opened by cannotgetaname 12 months ago - 3 comments

#225 - Add ROM config for gf180mcu

Pull Request - State: closed - Opened by mole99 12 months ago - 5 comments

#224 - Feature request: PROM

Issue - State: closed - Opened by spth about 1 year ago - 1 comment

#223 - Fix wire capacitance unit in sky130, gf180

Pull Request - State: open - Opened by ubfx about 1 year ago

#222 - Support for ASAP7 (open source 7nm PDK)

Issue - State: closed - Opened by StephenMoreOSU about 1 year ago - 1 comment

#221 - How to generate an SRAM with more than two ports?

Issue - State: closed - Opened by HotCoCoC about 1 year ago - 5 comments

#220 - LVS mismatch for some sky130 example SRAMs

Issue - State: open - Opened by ubfx about 1 year ago

#219 - Use volare in Makefile

Pull Request - State: closed - Opened by mole99 about 1 year ago - 11 comments

#218 - Use Volare as PDK version manager

Issue - State: closed - Opened by mole99 about 1 year ago - 5 comments

#217 - LVS mismatch errors in SKY130 SRAM

Issue - State: open - Opened by KEVIN09876 about 1 year ago - 1 comment

#216 - ROM signal names do not match model

Issue - State: closed - Opened by mole99 about 1 year ago - 2 comments

#215 - Add LEF output for ROM

Pull Request - State: closed - Opened by mole99 about 1 year ago

#214 - Virtuoso Layout using freepdk45

Issue - State: closed - Opened by tomaschoi03 about 1 year ago - 2 comments

#213 - Generating bit cell array with custom bit cell.

Issue - State: closed - Opened by tomaschoi03 over 1 year ago - 4 comments

#212 - scn3me_subm tech CellProperties error

Issue - State: closed - Opened by htm23x over 1 year ago - 4 comments

#211 - Pin iterator not found error in hierarchy_layout.py

Issue - State: closed - Opened by htm23x over 1 year ago - 11 comments

#210 - Validate tech_name param in compiler/globals.py

Pull Request - State: open - Opened by htm23x over 1 year ago - 2 comments

#209 - 4 test case failed for freepdk and scn4m

Issue - State: closed - Opened by z4fang over 1 year ago - 4 comments

#208 - Support for IHP PDK

Issue - State: open - Opened by htm23x over 1 year ago - 1 comment
Labels: enhancement, help wanted

#207 - sram_compiler.py - python 3.8.18 posixpath error

Issue - State: closed - Opened by htm23x over 1 year ago - 4 comments

#206 - Errors on characterization process

Issue - State: open - Opened by andreili over 1 year ago

#204 - Missing pins issue for single port memory using sky130

Issue - State: closed - Opened by NamrathaCTR over 1 year ago - 5 comments

#203 - Invalid column decoder encountered when generating large-scale SRAM

Issue - State: closed - Opened by Chuld over 1 year ago - 3 comments

#202 - installaion problem and configuratiom problem

Issue - State: closed - Opened by haotommy over 1 year ago - 13 comments

#201 - Anaconda install problem

Issue - State: closed - Opened by haotommy over 1 year ago - 8 comments

#200 - having issue while trying to create sram for sky130 pdk

Issue - State: closed - Opened by bharath19-gs over 1 year ago - 5 comments

#199 - data not getting written into memory cells

Issue - State: open - Opened by KolliparaAbhishekAnand over 1 year ago - 6 comments

#198 - How to use the .sp&.v generated after executing config on other tools

Issue - State: closed - Opened by haotommy over 1 year ago - 12 comments

#197 - the meaning of local_array_size

Issue - State: closed - Opened by hanm2019 over 1 year ago - 3 comments

#196 - Adding linear regression model breaks flow

Issue - State: open - Opened by jackpanderson over 1 year ago - 1 comment

#195 - SKY130 SRAM Module Simulated at Very High Frequencies?

Issue - State: closed - Opened by jackpanderson over 1 year ago - 1 comment

#194 - Make pdk still broken, having trouble installing with conda

Issue - State: closed - Opened by jackpanderson almost 2 years ago - 15 comments

#193 - make pdk broken at the moment? Error 127

Issue - State: closed - Opened by jackpanderson almost 2 years ago - 2 comments

#191 - ROM generation tutorial/references

Issue - State: open - Opened by SPD3 almost 2 years ago - 2 comments

#190 - ERROR:Replica bit cannot be the dummy row.

Issue - State: closed - Opened by akifcelik almost 2 years ago - 3 comments

#189 - Got TypeError when running example

Issue - State: closed - Opened by jiegec almost 2 years ago - 4 comments

#188 - "spare_wen0" pin missing in the output lib file

Issue - State: open - Opened by zpzhu99 almost 2 years ago

#187 - added openram.ipynb and docs references to it

Pull Request - State: closed - Opened by sfmth almost 2 years ago

#186 - openram.ipynb added

Pull Request - State: closed - Opened by sfmth almost 2 years ago - 1 comment

#185 - make macro docs update

Pull Request - State: open - Opened by sfmth almost 2 years ago - 2 comments

#183 - ERROR: file router.py: line 702: No pins overlapped the tracks.

Issue - State: closed - Opened by zpzhu99 almost 2 years ago - 8 comments

#182 - Could not find the "fet_libraries" or "fet_models" during the compilation.

Issue - State: open - Opened by apaul33 almost 2 years ago - 1 comment

#181 - docs(usage): fix minor typo

Pull Request - State: closed - Opened by bovi almost 2 years ago

#180 - University Project - Porting to a new technology

Issue - State: closed - Opened by rushikeshusc almost 2 years ago - 2 comments

#179 - Compilation of 4KB SRAM breaks with KeyError: 'nand4_leakage'

Issue - State: open - Opened by nklimov-dev almost 2 years ago - 2 comments

#178 - Support for FreePDK15

Issue - State: closed - Opened by hsadok almost 2 years ago - 2 comments

#177 - DRC and LVS errors in sky130_sram_4kbyte_1rw1r_32x1024_8

Issue - State: closed - Opened by urielcho almost 2 years ago - 9 comments

#175 - Customizing the DELAY and T_HOLD Parameters in Verilog

Issue - State: closed - Opened by ALIASADALI almost 2 years ago - 1 comment

#174 - way to fast estimate area?

Issue - State: closed - Opened by JiacongSun about 2 years ago - 2 comments

#172 - Delay/area model for basic gates

Issue - State: open - Opened by JiacongSun about 2 years ago

#171 - Dockerfile build error

Issue - State: closed - Opened by rushikeshusc about 2 years ago - 2 comments

#170 - What the meaning of slew_scales and load_scales?

Issue - State: closed - Opened by JiacongSun about 2 years ago - 1 comment

#169 - Any document about analytical model used in OpenRAM for timing/area?

Issue - State: closed - Opened by JiacongSun about 2 years ago - 3 comments

#168 - Correct fosstodon typo

Pull Request - State: closed - Opened by gsmecher about 2 years ago - 1 comment

#167 - Add support for gf180mcu

Issue - State: open - Opened by xobs about 2 years ago

#166 - Unit Tests - make -j 3

Issue - State: open - Opened by haotommy about 2 years ago - 3 comments

#165 - SKY130 designs fail to run (and takes a long time to do so)

Issue - State: open - Opened by xobs about 2 years ago - 7 comments

#164 - `make pdk` followed by `make install` fails

Issue - State: closed - Opened by xobs about 2 years ago - 3 comments

#163 - Create yosys memlib mapping

Issue - State: open - Opened by xobs about 2 years ago - 3 comments

#162 - Installation Problem

Issue - State: closed - Opened by hakan-demirli about 2 years ago - 2 comments

#161 - How can I implement a 2rw-dual port memory?

Issue - State: closed - Opened by highsharp-wyj over 2 years ago - 6 comments

#160 - Does OpenRAM support pbitcell flow?

Issue - State: closed - Opened by highsharp-wyj over 2 years ago - 3 comments